Abstract: A silicon carbide semiconductor device having a MOS structure includes: a substrate; a channel area in the substrate; a first impurity area; a second impurity area; a gate insulating film on the channel area; and a gate on the gate insulating film. The channel area provides an electric current path. The channel area and the gate insulating film have an interface therebetween. The interface includes a dangling bond, which is terminated by a hydrogen atom or a hydroxyl. The interface has a hydrogen concentration equal to or larger than 2.6×1020 cm?3.

Abstract: A silicon carbide semiconductor device includes a semiconductor element disposed in a semiconductor substrate having a first conductive type silicon carbide layer and a silicon substrate. The device includes: a trench on the silicon carbide layer to reach the silicon substrate; and a conductive layer in the trench between the silicon carbide layer and the silicon substrate to connect to both of them. The semiconductor element is a vertical type semiconductor element so that current flows on both of a top surface portion and a backside surface portion of the semiconductor substrate. The current flows through the conductive layer.

Abstract: The principal surface of a p-type SiC substrate (1) is formed of a face intersecting (0001) Si-face at 10 to 16°. An n+ source region (2) and an n+ drain region (3) are formed in a surface layer portion at the principal surface of the p-type SiC substrate (1) so as to be separated from each other. A gate electrode (5) is formed on a gate oxide film (4) on the principal surface of the p-type SiC substrate (1).

Abstract: A silicon carbide semiconductor device includes: a semiconductor substrate having a principal surface and a backside surface; a drift layer disposed on the principal surface; a base region disposed on the drift layer; a source region disposed on the base region; a surface channel layer disposed on both of the drift layer and the base region for connecting between the source region and the drift layer; a gate insulation film disposed on the surface channel layer and including a high dielectric constant film; a gate electrode disposed on the gate insulation film; a source electrode disposed on the source region; and a backside electrode disposed on the backside surface.

Abstract: In a method of fabricating a SiC semiconductor device, a surface of a SiC layer (5, 48, 102) is processed into a cleaned surface terminated at Si. An oxide film (7, 49, 105) is formed on the cleaned surface of the SiC layer. The SiC layer with the oxide film is subjected to thermal oxidation at a temperature in a range of 700° C. to 900° C. so that only terminal Si at the cleaned surface of the SiC layer is oxidated and an interface between the oxide film and the SiC layer becomes an SiO2/SiC cleaned interface.

Abstract: In a method of fabricating a SiC semiconductor device, a surface of a SiC layer (5, 48, 102) is processed into a cleaned surface terminated at Si. An oxide film (7, 49, 105) is formed on the cleaned surface of the SiC layer. The SiC layer with the oxide film is subjected to thermal oxidation at a temperature in a range of 700° C. to 900° C. so that only terminal Si at the cleaned surface of the SiC layer is oxidated and an interface between the oxide film and the SiC layer becomes an SiO2/SiC cleaned interface.

Abstract: The principal surface of a p-type SiC substrate (1) is formed of a face intersecting (0001) Si-face at 10 to 16°. An n+ source region (2) and an n+ drain region (3) are formed in a surface layer portion at the principal surface of the p-type SiC substrate (1) so as to be separated from each other. A gate electrode (5) is formed on a gate oxide film (4) on the principal surface of the p-type SiC substrate (1).

Abstract: A semiconductor device, comprising: a semiconductor substrate comprising silicon carbide of a first conductivity type; a silicon carbide epitaxial layer of the first conductivity type; a first semiconductor region formed on the semiconductor substrate and comprising silicon carbide of a second conductivity type; a second semiconductor region formed on the first semiconductor region, comprising silicon carbide of the first conductivity type and separated from the semiconductor substrate of the first conductivity type by the first semiconductor region; a third semiconductor region formed on the semiconductor region, connected to the semiconductor substrate and the second semiconductor region, comprising silicon carbide of the first conductivity type, and of higher resistance than the semiconductor substrate; and a gate electrode formed on the third semiconductor region via an insulating layer; wherein the third semiconductor layer is depleted when no voltage is being applied to the gate electrode so that said s

Abstract: In a method of fabricating a SiC semiconductor device, a surface of a SiC layer (5, 48, 102) is processed into a cleaned surface terminated at Si. An oxide film (7, 49, 105) is formed on the cleaned surface of the SiC layer. The SiC layer with the oxide film is subjected to thermal oxidation at a temperature in a range of 700° C. to 900° C. so that only terminal Si at the cleaned surface of the SiC layer is oxidated and an interface between the oxide film and the SiC layer becomes an SiO2/SiC cleaned interface.

Abstract: In a method for manufacturing a silicon carbide semiconductor device including a gate oxide film formed on a surface channel layer, the gate oxide film is formed by a thermal oxidation treatment that is performed at conditions under which a recrystallization reaction between silicon dioxide (SiO2) and carbon (C) occurs to produce silicon carbide (SiC) with a Gibbs free energy G3 being negative. The recrystallization reaction is expressed by a chemical formula of SiO2+3C→SiC+2CO+G3. Accordingly, residual carbon can be reduced at an interface between the gate oxide film and the surface channel layer.

Abstract: In an accumulation mode MOSFET, a surface channel layer is disposed on a p− type base region between an n+ type source region and an n− type epi layer. The surface channel layer is composed of an n type channel layer formed on the p− type base region and a p type channel layer formed on the n type channel layer. A gate insulating film is formed on the p type channel layer. A channel is formed in the n type channel layer. Accordingly, channel mobility can be improved and on-resistance can be reduced without being affected by a state of an interface between the gate insulating film and the surface channel layer.

Abstract: A vertical type power MOSFET made of silicon carbide includes a surface channel layer doped with nitrogen as dopant with a concentration equal to or less than 1×1015 cm−3. Accordingly, when a gate oxide film is formed on the surface channel layer, an amount of silicon nitride produced in the gate oxide film and at the interface between the gate oxide film and the surface channel layer becomes extremely small. As a result, carrier traps are prevented from being produced by silicon nitride, resulting in stable FET characteristics and high reliability to the gate oxide film.

Abstract: A contact adhering method comprising the steps of: (1) applying a layer of a moisture curable adhesive to at least one of two adherends; (2) maintaning the two adherends in non-contact with each other for a period of time until the surface of the layer of moisture curable adhesive develops tack as a result of exposure to atmospheric moisture; and (3) bringing the two adherends into contact with each other in a tack range.

Abstract: A surface portion of a p type base region is made amorphous as an amorphous layer by implanting nitrogen ions which serve as impurities and ions which do not serve as impurities. After that, the amorphous layer is crystallized to have a specific crystal structure through solid-phase growth while disposing the impurities at lattice positions of the crystal structure. As a result, a surface channel layer is formed with a high activation rate of the impurities.

Abstract: A vertical type power MOSFET made of silicon carbide includes a surface channel layer doped with nitrogen as dopant with a concentration equal to or less than 1.times.10.sup.15 cm.sup.-3. Accordingly, when a gate oxide film is formed on the surface channel layer, an amount of silicon nitride produced in the gate oxide film and at the interface between the gate oxide film and the surface channel layer becomes extremely small. As a result, carrier traps are prevented from being produced by silicon nitride, resulting in stable FET characteristics and high reliability to the gate oxide film.

Abstract: A negative electrode comprises carbon particles which individually consist of a core of crystalline carbon and an amorphous carbon layer formed on at least a part of the surfaces of the core, and an amorphous carbon matrix dispersing the carbon particles therein. The carbon matrix is formed by thermal decomposition of a thermosetting resin. A non-aqueous electrolyte secondary cell which comprises an electrode of the type mentioned above as at least one of electrodes is also described.

Abstract: A container for storing a moisture-sensitive material which comprises a fillable space behind the moisture-sensitive material, which has contained therein a water-reactive, highly volatile silane, alkyl titanate or isocyanate which, upon reaction with water, produces a low-viscosity material which is water repellant. The water-reactive compound prevents contact of moisture with the moisture-sensitive material while it is in the container.

Abstract: A one component room temperature curable sealant composition comprising:(A) a polyether polymer having at its terminal a hydrolyzable silicone functional group represented by the general formula: ##STR1## (B) a partial addition condensation product of: (a) an aminoalkylalkoxysilane represented by the general formula: ##STR2## with (b) an epoxy compound containing at least one epoxy group in its molecule and having a molecular weight of from 100 to 1000 and an epoxy equivalent of from 100 to 500,(c) a compound represented by the general formula: ##STR3## (d) an alkoxy silane represented by the general formula: ##STR4## (e) an organic titanic acid ester; and (C) a condensation catalyst of a silanol compound.