Patents by Inventor Eiji Hayashi
Eiji Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180068936Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: ApplicationFiled: October 27, 2017Publication date: March 8, 2018Inventors: Eiji HAYASHI, Kyo GO, Kozo HARADA, Shinji BABA
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Patent number: 9868629Abstract: A semiconductor device includes: a semiconductor element; a case; a terminal made of a conductive material and embedded in the case, a part of the terminal being exposed to the outside, having an outermost surface that includes a first film, and having a base portion; a bonding wire that is connected to the first film and electrically connects the semiconductor element and the terminal; and a protection member that is more flexible than the case and covers a contact portion of the terminal contacting with the bonding wire. The first film is removed from an area around the contact portion with the bonding wire in the part of the terminal being exposed to the outside, causing the base portion to be exposed. An exposed portion of the base portion and the protection member adhere to each other.Type: GrantFiled: April 17, 2015Date of Patent: January 16, 2018Assignee: DENSO CORPORATIONInventors: Nobukazu Oba, Yasuhiro Yamashita, Wataru Kobayashi, Eiji Hayashi
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Publication number: 20180004928Abstract: A system for automatic authentication of a user to allow access to websites and physical devices which provides tiered levels of security and defines an API protocol for exchange of authentication credentials.Type: ApplicationFiled: February 19, 2016Publication date: January 4, 2018Applicant: CARNEGIE MELLON UNIVERSITYInventors: Eiji Hayashi, Jason Hong
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Patent number: 9831166Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: GrantFiled: January 4, 2017Date of Patent: November 28, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Eiji Hayashi, Kyo Go, Kozo Harada, Shinji Baba
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Publication number: 20170278774Abstract: A semiconductor device includes: a semiconductor chip having an electrode on one surface; a first conductive member disposed on one surface side of the semiconductor chip; a metal member having a base member and a membrane and disposed between the semiconductor chip and the first conductive member; a first solder disposed between the electrode of the semiconductor chip and the metal member; and a second solder disposed between the metal member and the first conductive member. The membrane has a metal thin film arranged on the surface of the base member and an uneven oxide film. The uneven oxide film is arranged on the metal thin film in at least a part of a connection region of a surface of the metal member, the connection region connecting a first connection region to which the first solder is connected and a second connection region to which the second solder is connected.Type: ApplicationFiled: December 4, 2015Publication date: September 28, 2017Inventors: Eiji HAYASHI, Wataru KOBAYASHI, Eiji NOMURA, Kazuki KOUDA
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Patent number: 9759779Abstract: A state of charge estimation device for estimating a state of charge of iron phosphate lithium ion batteries includes a voltage measurement component configured to measure a voltage across the iron phosphate lithium ion batteries, a current measurement component configured to measure a current flowing through the iron phosphate lithium ion batteries, and a controller component configured to, when an estimation of the state of charge of the iron phosphate lithium ion batteries based on an accumulated amount of currents measured by the current measurement component is defined as a current accumulation method and an estimation of the state of charge of the iron phosphate lithium ion batteries based on an open circuit voltage (OCV) of the iron phosphate lithium ion batteries measured by the voltage measurement component is defined as an OCV method, permit the estimation of the state of charge by the OCV method.Type: GrantFiled: June 23, 2016Date of Patent: September 12, 2017Assignee: GS YUASA INTERNATIONAL LTD.Inventors: Eiji Hayashi, Masashi Nakamura
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Patent number: 9666799Abstract: An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.Type: GrantFiled: October 31, 2014Date of Patent: May 30, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Naohito Yanagida, Cheng Feng, Michiaki Sano, Akira Nakada, Steven J. Radigan, Eiji Hayashi
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Publication number: 20170144882Abstract: A semiconductor device includes: a semiconductor element; a case; a terminal made of a conductive material and embedded in the case, a part of the terminal being exposed to the outside, having an outermost surface that includes a first film, and having a base portion; a bonding wire that is connected to the first film and electrically connects the semiconductor element and the terminal; and a protection member that is more flexible than the case and covers a contact portion of the terminal contacting with the bonding wire. The first film is removed from an area around the contact portion with the bonding wire in the part of the terminal being exposed to the outside, causing the base portion to be exposed. An exposed portion of the base portion and the protection member adhere to each other.Type: ApplicationFiled: April 17, 2015Publication date: May 25, 2017Inventors: Nobukazu OBA, Yasuhiro YAMASHITA, Wataru KOBAYASHI, Eiji HAYASHI
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Publication number: 20170117216Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: ApplicationFiled: January 4, 2017Publication date: April 27, 2017Inventors: Eiji HAYASHI, Kyo GO, Kozo HARADA, Shinji BABA
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Patent number: 9620712Abstract: An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.Type: GrantFiled: October 31, 2014Date of Patent: April 11, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Eiji Hayashi, Naohito Yanagida, Michiaki Sano, Akira Nakada
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Publication number: 20170077184Abstract: An alternating material stack of insulator lines and first electrically conductive material layers is formed over a substrate, and is patterned to provide alternating stacks of insulating layers and first electrically conductive lines. A metal can be selectively deposited on the physically exposed sidewalls of the first electrically conductive material layers to form metal lines, while not growing from the surfaces of the insulator lines. The metal lines are oxidized to form metal oxide lines that are self-aligned to the sidewalls of the first electrically conductive lines. Vertically extending second electrically conductive lines can be formed as a two-dimensional array of generally pillar-shaped structures between the alternating stacks of the insulator lines and the first electrically conductive lines. Each portion of the metal oxide lines at junctions of first and second electrically conductive lines constitute a resistive memory element for a resistive random access memory (ReRAM) device.Type: ApplicationFiled: September 11, 2015Publication date: March 16, 2017Inventors: Shin KIKUCHI, Kazushi KOMEDA, Takuya FUTASE, Teruyuki MINE, Seje TAKAKI, Eiji HAYASHI, Toshihide TOBITSUKA
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Patent number: 9576890Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: GrantFiled: August 19, 2016Date of Patent: February 21, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Eiji Hayashi, Kyo Go, Kozo Harada, Shinji Baba
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Patent number: 9523711Abstract: A probe apparatus includes a card clamp unit detachably supporting a probe card; and a wafer mounting table adsorbing the semiconductor wafer and bringing electrodes on the semiconductor wafer into contact with the probes. In order to mount the semiconductor wafer including an annular portion protruding from a rear surface of an outer peripheral portion and a thin portion having a thickness smaller than the annular portion, the wafer mounting table includes a planar portion on which the thin portion is mounted; and a step-shaped portion which is formed at an edge of the planar portion and mounts the annular portion thereon. Multiple circular vacuum chuck grooves are concentrically formed in the planar portion, and at least some of the vacuum chuck grooves are connected to multiple vacuum paths through which vacuum evacuation is performed at multiple positions separated from each other by 90° or more along a circumferential direction.Type: GrantFiled: April 25, 2013Date of Patent: December 20, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Kazuya Yano, Eiji Hayashi, Munetoshi Nagasaka
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Patent number: 9517532Abstract: An object is to form a rough surface for ensuring adhesion between a metal member and other members, or a rough surface for suppressing solder expansion in the metal member using an energy beam having energy density lower than a related art. A surface processing method of a metal member, in which a metal thin film is arranged on a surface of a base, includes: melting or evaporating a surface portion of the metal thin film by irradiating the metal thin film with a pulse-oscillated laser beam having energy density of 100 J/cm2 or less and a pulse width of 1 ?s or less; and roughening the surface of the metal thin film by solidifying the surface portion of the metal thin film after the melting or evaporating. The metal thin film is made of at least one of Ni, Au, Pd, and Ag as a main component.Type: GrantFiled: November 10, 2014Date of Patent: December 13, 2016Assignee: DENSO CORPORATIONInventors: Wataru Kobayashi, Eiji Hayashi, Kazuki Kouda
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Publication number: 20160358846Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: ApplicationFiled: August 19, 2016Publication date: December 8, 2016Inventors: Eiji HAYASHI, Kyo GO, Kozo HARADA, Shinji BABA
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Publication number: 20160332657Abstract: A pin assembly includes: a resin pin; and a collar fitted to a round shaft portion of the resin pin and having higher hardness than the resin pin. The round shaft portion is sheared to cancel connection between a first plate and a second plate upon secondary collision of a vehicle. The collar includes an end face received by a reception surface of the second plate, and shears the round shaft portion in a shear plane along the end face upon the secondary collision. The round shaft portion includes a hollow hole. An inner circumference of the hollow hole includes a straight portion which has a generating line parallel to an axial direction of the round shaft portion and which is traversed by a plane including the end face of the collar.Type: ApplicationFiled: December 25, 2014Publication date: November 17, 2016Applicants: JTEKT CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, DAIWA PLASTICS CO., LTD.Inventors: Eiji TANAKA, Susumu IMAGAKI, Hiroyuki YAO, Kenji IMAMURA, Kentaro OKUNO, Eiji HAYASHI
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Patent number: 9496153Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: GrantFiled: February 17, 2016Date of Patent: November 15, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Eiji Hayashi, Kyo Go, Kozo Harada, Shinji Baba
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Patent number: 9482722Abstract: A state of charge estimation device for estimating a state of charge of an electric storage device includes a voltage measurement component, a current measurement component, and a controller component. The controller component is configured to, when estimation of state of charge of the electric storage device based on an accumulated amount of currents measured by the current measurement component is defined as a current accumulation method and the estimation based on an open circuit voltage (OCV) of the electric storage device measured by the voltage measurement component is defined as an OCV method, permit estimation of state of charge by the OCV method when a condition that an error in estimation of state of charge of the electric storage device by the current accumulation method exceeds an error in estimation of state of charge of the electric storage device by the OCV method is satisfied.Type: GrantFiled: February 18, 2014Date of Patent: November 1, 2016Assignee: GS YUASA INTERNATIONAL LTD.Inventors: Eiji Hayashi, Masashi Nakamura
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Publication number: 20160299193Abstract: A state of charge estimation device for estimating a state of charge of iron phosphate lithium ion batteries includes a voltage measurement component configured to measure a voltage across the iron phosphate lithium ion batteries, a current measurement component configured to measure a current flowing through the iron phosphate lithium ion batteries, and a controller component configured to, when an estimation of the state of charge of the iron phosphate lithium ion batteries based on an accumulated amount of currents measured by the current measurement component is defined as a current accumulation method and an estimation of the state of charge of the iron phosphate lithium ion batteries based on an open circuit voltage (OCV) of the iron phosphate lithium ion batteries measured by the voltage measurement component is defined as an OCV method, permit the estimation of the state of charge by the OCV method.Type: ApplicationFiled: June 23, 2016Publication date: October 13, 2016Inventors: Eiji Hayashi, Masashi Nakamura
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Patent number: 9449854Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.Type: GrantFiled: February 17, 2016Date of Patent: September 20, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Eiji Hayashi, Kyo Go, Kozo Harada, Shinji Baba