Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: The present disclosure relates to a solid-state imaging element capable of suppressing an occurrence of image breakup in imaging of a moving subject, a solid-state imaging element operation method, an imaging apparatus, and an electronic device. Pixel signals of G pixels (including Gb and Gr pixels) defined as a reference of a luminance value among pixels of images captured by an imaging element are simultaneously scanned to undergo analog-to-digital conversion in an order not causing stagnation in a predetermined direction of analog-to-digital conversion, and at this time, R and B pixels other than the pixels defined as the reference of the luminance value undergo analog-to-digital conversion by simultaneous scan of pixels in the vicinity of the G pixels defined as the reference of the luminance value that undergo analog-to-digital conversion. The present disclosure can be applied to an imaging apparatus.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: The present technology relates to a solid-state imaging device and an electronic apparatus that can increase the theoretical yield of a chip. A pixel array is formed with pixels arranged in a matrix. A drive control unit is provided for each set of pixel rows in the pixel array. The drive control unit operates to simultaneously drive the pixels included in the set of pixel rows. The present technology can be applied to a CMOS image sensor including A/D converter circuits for each column in a pixel array.

Abstract: The present technology is provided to accurately correct uneven luminance while suppressing an increase in the size of the solid-state imaging element. A pixel array unit includes a plurality of lines each including a predetermined number of pixels each being arrayed in a predetermined direction. An analog-to-digital conversion unit includes more than the predetermined number of analog-to-digital converters that convert analog signals into digital signals. A scanning circuit controls to sequentially select the plurality of lines and output more than the predetermined number of analog signals to the analog-to-digital conversion unit every time the line is selected. A correction unit performs black level correction processing on the digital signal.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: A solid-state imaging device adapted to encrypt data is described. The solid-state imaging device may include a sensor die comprising an array of imaging pixels formed on a first side of the sensor die and first wiring layers formed on a second side of the sensor die, wherein at least one of the imaging pixels is configured to generate specific signals; a logic die comprising second wiring layers formed on a first side of the logic die; and an encryption processor on the logic die configured to generate encrypted data using the specific signals. The first side of the logic die may be mounted adjacent to the second side of the sensor die and the first wiring layers electrically connect to the second wiring layers, wherein the at least one of the imaging pixels, the encryption processor, and a connecting conductor in which the specific signals pass through from the at least one of the imaging pixels to the encryption processor are located interior to the solid-state imaging device.

Abstract: There is provided an imaging device that includes a pixel, the pixel comprising: a photodetector; a control transistor; a capacitor coupled to the photodetector; a reset transistor coupled between the control transistor and the capacitor; an amplifier transistor having a gate terminal coupled to the capacitor; and a select transistor coupled to the amplifier transistor; a first signal line coupled to the select transistor; and a first amplifying circuit including a first input terminal coupled to the first signal line and a second input terminal configured to receive a first reference signal and an output terminal coupled to the control transistor.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: The present disclosure relates to a solid-state imaging element capable of suppressing an occurrence of image breakup in imaging of a moving subject, a solid-state imaging element operation method, an imaging apparatus, and an electronic device. Pixel signals of G pixels (including Gb and Gr pixels) defined as a reference of a luminance value among pixels of images captured by an imaging element are simultaneously scanned to undergo analog-to-digital conversion in an order not causing stagnation in a predetermined direction of analog-to-digital conversion, and at this time, R and B pixels other than the pixels defined as the reference of the luminance value undergo analog-to-digital conversion by simultaneous scan of pixels in the vicinity of the G pixels defined as the reference of the luminance value that undergo analog-to-digital conversion. The present disclosure can be applied to an imaging apparatus.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: The present technology relates to a solid-state imaging device and an electronic apparatus that can increase the theoretical yield of a chip. A pixel array is formed with pixels arranged in a matrix. A drive control unit is provided for each set of pixel rows in the pixel array. The drive control unit operates to simultaneously drive the pixels included in the set of pixel rows. The present technology can be applied to a CMOS image sensor including A/D converter circuits for each column in a pixel array.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: An oscillator includes: inverters that are connected in a loop shape and of which the number is an odd number greater than or equal to three; and a delay section that delays change in a voltage which is input to one inverter of the odd number of inverters. The one inverter is a schmitt trigger inverter. The schmitt trigger inverter includes a current source, and a resistor in which current supplied by the current source flows. A hysteresis width of the schmitt trigger inverter depends on the current which flows in the resistor.

Abstract: An oscillator includes: inverters that are connected in a loop shape and of which the number is an odd number greater than or equal to three; and a delay section that delays change in a voltage which is input to one inverter of the odd number of inverters. The one inverter is a schmitt trigger inverter. The schmitt trigger inverter includes a current source, and a resistor in which current supplied by the current source flows. A hysteresis width of the schmitt trigger inverter depends on the current which flows in the resistor.

Abstract: This invention provides a multilayer printed wiring board having flat via holes. This is a multilayer printed wiring board formed by alternately laminating multiple metal foils and insulating layers, in which an interlayer connection via pad provided in a first insulating layer, a wiring circuit and an interlayer connection via bottom pad of a second insulating layer are provided in the same surface layer and at least the interlayer connection via pad and the interlayer connection via bottom pad of the second insulating layer have the same thickness.

Abstract: The present invention provides a printed wiring board in which there is no positional deviation between a blind via hole and a land and which enables high-density wiring design to be easily achieved. Provided is a method of manufacturing a printed wiring board in which wiring pattern forming layers are connected by a blind via hole, which includes the steps of forming a wiring pattern by etching at least metal foil laminated on a surface of an insulating layer and forming a land having a window portion in a portion where a blind via hole is to be formed; irradiating the window portion with a laser beam having a diameter larger than the diameter of the window portion but smaller than the diameter of the land, thereby making a nonthrough hole for forming the blind via hole; and forming a blind via hole by forming a plating on the nonthrough hole and the land.

Abstract: The present invention provides a printed-wiring board which can make the electric wiring densified and can be thinned, even when having a BVH of a non-penetration hole filled with a selectively plating, formed therein for interfacial connection means. The printed-wiring board has a blind via hole connecting different wiring-pattern-formed layers with each other, wherein the blind via hole is a non-penetration hole filled with a plating, and the plating is not formed on a wiring pattern including the round of the blind via hole.

Abstract: This invention provides a multilayer printed wiring board having flat via holes. This is a multilayer printed wiring board formed by alternately laminating multiple metal foils and insulating layers, in which an interlayer connection via pad provided in a first insulating layer, a wiring circuit and an interlayer connection via bottom pad of a second insulating layer are provided in the same surface layer and at least the interlayer connection via pad and the interlayer connection via bottom pad of the second insulating layer have the same thickness.