Patents by Inventor Eiji Nishimori

Eiji Nishimori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6900620
    Abstract: A switching regulator circuit includes an inductor, a first condenser which provides a potential stored therein as a first output of the switching regulator circuit, a second condenser which provides a potential stored therein as a second output of the switching regulator circuit, and a switch set including a plurality of switches, the switch set establishing a first path, a second path, and a third path, the first path supplying energy from a DC power supply to the inductor for accumulation of the energy therein, the second path supplying the energy accumulated in the inductor to the first condenser, and the third path supplying the energy accumulated in the inductor to the second condenser.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: May 31, 2005
    Assignee: Fujitsu Limited
    Inventors: Eiji Nishimori, Toshiyuki Sekizawa
  • Publication number: 20030184269
    Abstract: A switching regulator circuit includes an inductor, a first condenser which provides a potential stored therein as a first output of the switching regulator circuit, a second condenser which provides a potential stored therein as a second output of the switching regulator circuit, and a switch set including a plurality of switches, the switch set establishing a first path, a second path, and a third path, the first path supplying energy from a DC power supply to the inductor for accumulation of the energy therein, the second path supplying the energy accumulated in the inductor to the first condenser, and the third path supplying the energy accumulated in the inductor to the second condenser.
    Type: Application
    Filed: March 18, 2003
    Publication date: October 2, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Eiji Nishimori, Toshiyuki Sekizawa
  • Publication number: 20030117209
    Abstract: A reduced-size bipolar supply voltage generator which produces a positive and negative voltages from a unipolar power source. A single inductor is employed for current switching operation, where electric energy supplied from a power source is stored in magnetic form, and the stored magnetic energy is released as electric energy. A first and second diodes are connected to first and second ends of the inductor, respectively. The inductor is grounded at the first end via a first switch, while its second end is connected to the power source via a second switch. A switching controller activates both switches to energize the inductor. It then deactivates the first switch alone, thus directing the inductor's energy to the positive voltage output through the first diode. The controller may turn off the second switch alone after energizing the inductor. The stored energy now appears at the negative voltage output through the second diode.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 26, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Chikara Tsuchiya, Kimitoshi Niratsuka, Eiji Nishimori, Katsuyoshi Otsu
  • Patent number: 5982810
    Abstract: A correlator used for spread spectrum communications which reduces consumed power. A signal extraction circuit (6) is provided for directly extracting phase information from an input signal which expresses two values of code data by each phase of a plurality of cycles. A signal transferring circuit (1) is connected to the signal extraction circuit (6) for transferring the phase information to a multiplying circuit (2) comprised of a plurality of multipliers. Signals in each cell of the signal transferring circuit (1) are multiplied by fixed coefficients within the multiplying circuit (2) and supplied to an adding circuit (3) for determination of a correlation peak value.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: November 9, 1999
    Assignee: New Japan Radio Co., Ltd.
    Inventor: Eiji Nishimori
  • Patent number: 5668506
    Abstract: In a digital temperature compensated crystal oscillator, ADC circuit and DAC circuit are combined into a data conversion circuit which comprises a first section for DA conversion, a second section for converting an analog temperature voltage signal into a digital form in cooperation with the first section, and a third section for supplementing the DA conversion of the first section and thereby generating an analog control voltage for a VCO from a digital temperature compensation data. There is further provided a switch circuit for connecting the output of the first section to either of the second and third section.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: September 16, 1997
    Assignees: Kabushiki Kaisha Meidensha, Fujitsu Limited
    Inventors: Takao Watanabe, Mutsuo Hayashi, Kazunari Matsumoto, Chikara Tsuchiya, Eiji Nishimori, Takashi Matsui
  • Patent number: 5638460
    Abstract: Disclosed is an evaluation method and apparatus used as when inspecting the mounted state of an IC. The evaluation method and apparatus are adapted to acquire the image of an object under inspection, subject the image to two types of image processing based upon two different evaluation methods, and inspect and evaluate the object as regards to the acceptability of soldered state, for example, based upon the results of the two evaluations.
    Type: Grant
    Filed: December 29, 1993
    Date of Patent: June 10, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Eiji Nishimori, Toshiaki Shingu
  • Patent number: 5392361
    Abstract: A mark position detecting method and apparatus, suitably usable in a semiconductor device manufacturing exposure apparatus, called a stepper, prints images of a pattern of a reticle upon different shot areas on a semiconductor wafer, and aligns the reticle and the wafer. In this method, fuzzy reasoning is made by using, for example, a membership function which empirically represents the relationship between a mark signal and an alignment result. By using a conclusion of the fuzzy reasoning, the position of the mark is detected. Thus, the alignment accuracy can be improved significantly.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: February 21, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaaki Imaizumi, Eiji Nishimori, Yasuteru Ichida, Naoki Ayata
  • Patent number: 5121151
    Abstract: Disclosed is a focus adjustment information forming device of the kind arranged to measure distances at a plurality of distance measuring areas on a picture plane specified by optical means which has its focal point being adjusted and to form information on adjustment of the focal point, the plurality of distance measuring areas including a center distance area located approximately in the center of the picture plane.
    Type: Grant
    Filed: April 26, 1991
    Date of Patent: June 9, 1992
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Kawabata, Yukio Odaka, Hiroshi Miyanari, Eiji Nishimori, Toshiaki Shingu, Yasuteru Ichida, Hidetoshi Masuda
  • Patent number: 4551644
    Abstract: A gate circuit for analog signals composed of field effect transistors is provided. The analog signal is switched on and off by variation of the conductance of the FETs. Distortion of the signal is a crucial problem for such circuits, which is overcome by detecting the voltages at both the source and drain sides of the switching transistor which controls the signals to be on and off, and by feeding the voltages back to the gate of the switching transistor. The inner resistance of the switching transistor when it is in the on state is reduced, and becomes symmetric at both sides of V.sub.DS0. As a result the second order distortion is greatly reduced.
    Type: Grant
    Filed: October 31, 1983
    Date of Patent: November 5, 1985
    Assignee: Fujitsu Limited
    Inventors: Eiji Nishimori, Chikara Tsuchiya, Yoshiaki Sano
  • Patent number: RE36280
    Abstract: Disclosed is a focus adjustment information forming device of the kind arranged to measure distances at a plurality of distance measuring areas on a picture plane specified by optical means which has its focal point being adjusted and to form information on adjustment of the focal point, the plurality of distance measuring areas including a center distance area located approximately in the center of the picture plane.
    Type: Grant
    Filed: May 4, 1993
    Date of Patent: August 24, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Kawabata, Yukio Odaka, Hiroshi Miyanari, Eiji Nishimori, Toshiaki Shingu, Yasuteru Ichida, Hidetoshi Masuda