Patents by Inventor Eiju Maehara

Eiju Maehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020027276
    Abstract: After a trench 54 is formed in a conductive foil 60, a circuit element is mounted in a flip chip method. Then, an insulating resin 50 is covered on the conductive foil 60 as a support substrate. After reversion, the conductive foil 60 is polished over the insulating resin 50 as a support substrate at this time to separate the conductive paths. Accordingly, a circuit device having the conductive paths 51 and the circuit elements 52 supported by the insulating resin 50 can be produced without employing the support substrate.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi, Hirokazu Fukuda, Hiroki Etou
  • Publication number: 20020027298
    Abstract: AS conductive patterns 11A to 11D are formed burying in a insulating resin 10 and a conductive foil 20 is formed being half-etched, thickness of the device is made thin. As an electrode for radiation 11D is provided, a semiconductor device superior in radiation is provided. Thickness of an electric connection means SD is substantially made definite as the electric connection means SD does not flow to a conductive path 11B by using a flow-prevention film DM.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20020028525
    Abstract: After mounting portions (65) are formed in each block (62), circuit elements are mounted on the mounting portions (65) and molded with insulating resin (50). Then, the back surface of conductive foil (60) is etched to form conductive patterns 51in each block. Further, a plurality of blocks are bonded onto a adhesive sheet so that a testing step and a dicing step are carried out upon the blocks in a lump.
    Type: Application
    Filed: August 31, 2001
    Publication date: March 7, 2002
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Yukio Okada, Yusuke Igarashi, Eiju Maehara, Kouji Takahashi
  • Publication number: 20010052600
    Abstract: There are provided the steps of preparing a conductive foil and then forming a plurality of conductive paths by forming isolation trenches, which are shallower than a thickness of the conductive foil, in the conductive foil except at least areas serving as the conductive paths, fixing respective photo semiconductor chips (65) to desired conductive paths, molding a light transparent resin (67) serving as a lens to cover respective photo semiconductor chips (65) individually and to fill the isolation trenches, and removing the conductive foil on the side on which the isolation trenches are not provided. Therefore, a light irradiating device (68), in which back surfaces of the conduction paths can be connected to the outside to thus eliminate through holes and which has the good radiation characteristic, can be implemented.
    Type: Application
    Filed: May 31, 2001
    Publication date: December 20, 2001
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa
  • Publication number: 20010050370
    Abstract: A light irradiating device (68) having the good radiation characteristic comprises a plurality of conductive paths (51) that are electrically separated, a photo semiconductor chips (65) fixed onto desired conductive path (51), and a resin (67) for covering the photo semiconductor chips (65) to support the conductive paths (51) integrally.
    Type: Application
    Filed: May 31, 2001
    Publication date: December 13, 2001
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Eiju Maehara, Kouji Takahashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa
  • Publication number: 20010045625
    Abstract: By forming a flat member 10 forming a conductive film 11 having substantially same pattern with a second bonding pad 17, a wiring 18, and an electrode 19 for taking out, or forming a flat member 30 half-etched through the conductive film 11, it is possible to manufacture a semiconductor device 23 of BGA structure using a back process of a semiconductor maker.
    Type: Application
    Filed: March 16, 2001
    Publication date: November 29, 2001
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Publication number: 20010026014
    Abstract: After a trench 14 has been formed in a conductive foil 60, a circuit element is mounted on the conductive foil 60. The surface of the structure is covered with insulating resin 10 using the conductive foil 60 as a supporting board. After the structure has been turned upside down, this time, the conductive foil is polished using the insulating resin 10 as a supporting board so that it is separated into conductive paths 11. Therefore, a semiconductor device 13 in which the conductive paths 11 and the semiconductor chip 12 are supported by the insulating resin 10 can be realized with no supporting board. In addition, since the semiconductor chip 12 is thermally coupled with a conductive path 11A, heat generated in the semiconductor chip 12 can be radiated externally.
    Type: Application
    Filed: March 16, 2001
    Publication date: October 4, 2001
    Inventors: Noriaki Sakamoto, Yoshiyuki Kobayashi, Junji Sakamoto, Shigeaki Mashimo, Katsumi Okawa, Eiju Maehara, Kouji Takahashi
  • Patent number: 5834977
    Abstract: An amplifying circuit according to the present invention has an amplifying unit for amplifying an input signal to produce an amplified signal, a battery for generating a constant voltage (a first voltage), a step-up converter for always generating an increased voltage (or a second voltage) by increasing the constant voltage, and a selection changing circuit for supplying the increased voltage to the amplifying unit as an electric source voltage when a level of the amplified signal is higher than the constant voltage and supplying the constant voltage to the amplifying unit as the electric source voltage when a level of the amplified signal is lower than the constant voltage. Therefore, because the electric source voltage supplied to the amplifying unit is changed according to the level of the amplified signal, a loss occurring in an electric power consumed in the amplifying unit can be reduced.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: November 10, 1998
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Eiju Maehara, Satoshi Sugimoto