Abstract: By using circularly-arranged signal points obtained by rearranging a part of signal points arranged in a rectangular shape or a cross shape, average signal power and peak signal energy are reduced to improve nonlinear distortion characteristics. Provided is a bit mapping method in which an average value of a Hamming distance in terms of a specified lower bit portion between adjacent signal points is small, and a Euclidean distance between signal points at which the lower bit portions assigned thereto coincide with each other becomes maximum. By applying error correction code only to the lower bit portion, a data transmission method excellent in bit error rate characteristics is provided while suppressing a band expansion rate.

Abstract: The wireless communication system is a MIMO communication system that uses a plurality of antennas to form a plurality of fixed transmission channels, and includes a transmitting section and a receiving section. The transmitting section performs MIMO spatial multiplexing as well as dual polarization transmission of transmitting two independent signals in the same band by using two mutually orthogonal polarizations of radio waves as signals to be transmitted from respective antennas on a transmitting side. The receiving section includes an inference canceller and a MIMO signal processing circuit that is connected to the interference canceller. The interference canceller performs signal processing for eliminating an interference component between the polarizations by adaptive control on signals received by respective antennas on a receiving side. The MIMO signal processing circuit performs signal processing for MIMO spatial demultiplexing independent of the signal processing of the interference canceller.

Abstract: A log likelihood ratio arithmetic circuit for calculating a log likelihood ratio from information of a coordinate of a reception signal point to be applied to a communication system using a quadrature amplitude modulation method, wherein the circuit limits a scope within which a value of the log likelihood ratio varies corresponding to a position of the reception signal point to a range between adjacent signal points including a hard-decision threshold of a bit, and wherein the value of the log likelihood ratio does not vary outside of the range between the adjacent signal points.

Abstract: A carrier recovery circuit, adapted to a demodulation circuit according to a quasi-coherent detection method for generating baseband signals by way of quadrature detection on a received signal having an intermediate frequency, rotates phases of baseband signals; detects a phase error and an amplitude error; controls a bandwidth of a loop filter based on its difference, eliminates a high-frequency component from the phase error; and performs phase rotation based on the phase error eliminating its high-frequency component. It expands the bandwidth of the loop filter when a difference between the phase error and the amplitude error is greater than a predetermined threshold, whilst reducing bandwidth of the loop filter upon determining that the amplitude error decreases due to a reduction of the bandwidth of the loop filter. This optimizes the bandwidth of the loop filter to follow variations of the C/N ratio of the received signal, improving bit error rate.

Abstract: An error correction decoder (101) counts the number of times of iterative decoding executed in the process of a predetermined error correcting operation, and outputs the iterative decoding count to an averaging circuit (102). The averaging circuit (102) calculates the average value of the iterative decoding counts input from the error correction decoder (101), and outputs the calculated average value of the iterative decoding counts to a comparator (103). The comparator (103) determines whether the iterative decoding count average value is larger than a predetermined threshold value. When determining that the average value is larger than the predetermined threshold value, the comparator (103) determines that a channel switching condition is met, and outputs a channel switching signal to a channel switching circuit (405).

Abstract: A PLL circuit, for extracting phase error information from a demodulated signal in which a variance of a phase or an amplitude changes depending on a signal-to-noise power ratio, and providing negative feedback control, to thereby suppress a phase error of the demodulated signal, includes: a phase error detector for producing a phase error signal corresponding to a value of the phase error as the phase error information; a limiter circuit for limiting an expression range of the phase error signal to a constant value or less to produce the limited phase error signal; and a loop filter for producing a control signal based on the limited phase error signal to determine frequency characteristics.

Abstract: A carrier recovery circuit, adapted to a demodulation circuit according to a quasi-coherent detection method for generating baseband signals by way of quadrature detection on a received signal having an intermediate frequency, rotates phases of baseband signals; detects a phase error and an amplitude error; controls a bandwidth of a loop filter based on its difference, eliminates a high-frequency component from the phase error; and performs phase rotation based on the phase error eliminating its high-frequency component. It expands the bandwidth of the loop filter when a difference between the phase error and the amplitude error is greater than a predetermined threshold, whilst reducing bandwidth of the loop filter upon determining that the amplitude error decreases due to a reduction of the bandwidth of the loop filter. This optimizes the bandwidth of the loop filter to follow variations of the C/N ratio of the received signal, improving bit error rate.

Abstract: The present invention relates to a modulation and demodulation method of minimizing an error rate and applying it to a differential operation modulo 4. A modulation apparatus includes a Gray coding circuit 101 to which data of (2n+1) bits are inputted (where “n” is an integer more than 1) and which encodes 2 bits of an input signal of (2n+1) bits to a Gray code as a signal for allowing four quadrants to be identified, an encoding circuit 102 that encodes 3 bits of the input signal of (2n+1) bits as a signal indicating any one of eight subgroups provided in each of the four quadrants so that an average Hamming distance between adjacent subgroups within its quadrant becomes a minimum, and a mapping circuit 104 that maps binary data encoded by the Gray coding circuit 101 and the encoding circuit 102 on the four quadrants.

Abstract: A radio communication apparatus includes a control unit for conducting modulation scheme changeover control to change a modulation scheme according to a state of a transmission path and automatic transmitter power control to control a transmission level of another radio communication apparatus to set a reception level of a reception signal to be received by the own apparatus to a predetermined value, wherein the control unit controls, when a changeover is conducted from a first modulation scheme to a second modulation scheme under the modulation scheme changeover control, to keep the transmission level of another radio communication apparatus at a predetermined value under the automatic transmitter power control and conducts, when resetting is conducted from the second modulation scheme to the first modulation scheme under the modulation scheme changeover control, at least one of transmission level reduction control to stepwise lower by a predetermined value the transmission level kept at the predetermined va

Abstract: A system that combines MIMO spatial multiplexing and dual polarization transmission is provided. The system is constructed with a simple circuit configuration, whereby a wireless communication system which accurately demodulates signals that are multiplexed doubly, both spatially and in polarization, is provided. The wireless communication system is a MIMO communication system that uses a plurality of antennas to form a plurality of fixed transmission channels, and includes a transmitting section and a receiving section. The transmitting section performs MIMO spatial multiplexing as well as dual polarization transmission of transmitting two independent signals in the same band by using two mutually orthogonal polarizations of radio waves as signals to be transmitted from respective antennas on a transmitting side. The receiving section includes an inference canceller and a MIMO signal processing circuit that is connected to the interference canceller.

Abstract: [Problems] To realize a log likelihood ratio calculation performed at a higher speed while the circuit size and the power consumption are reduced, regardless of the multilevel number of a modulation method. [Means for Solving the Problems] A hard-decision bit of the bits indicating the P-axial coordinate of a reception signal point is input to an area detection circuit, and based on the hard-decision bit input, the area detection circuit detects and outputs an area on the phase plane where the coordinate of the reception signal point is present. A soft-decision bit of the bits indicating the coordinate of the reception signal point is input to an LLR circuit, and based on the soft-decision bit input, the LLR circuit calculates a primary LLR. An LLR converter calculates the final LLR based on an output (area detection result) from the area detection circuit.

Abstract: A radio communication apparatus includes a control unit for conducting modulation scheme changeover control to change a modulation scheme according to a state of a transmission path and automatic transmitter power control to control a transmission level of another radio communication apparatus to set a reception level of a reception signal to be received by the own apparatus to a predetermined value, wherein the control unit controls, when a changeover is conducted from a first modulation scheme to a second modulation scheme under the modulation scheme changeover control, to keep the transmission level of another radio communication apparatus at a predetermined value under the automatic transmitter power control and conducts, when resetting is conducted from the second modulation scheme to the first modulation scheme under the modulation scheme changeover control, at least one of transmission level reduction control to stepwise lower by a predetermined value the transmission level kept at the predetermined va

Abstract: An error correction decoder (101) counts the number of times of iterative decoding executed in the process of a predetermined error correcting operation, and outputs the iterative decoding count to an averaging circuit (102). The averaging circuit (102) calculates the average value of the iterative decoding counts input from the error correction decoder (101), and outputs the calculated average value of the iterative decoding counts to a comparator (103). The comparator (103) determines whether the iterative decoding count average value is larger than a predetermined threshold value. When determining that the average value is larger than the predetermined threshold value, the comparator (103) determines that a channel switching condition is met, and outputs a channel switching signal to a channel switching circuit (405).

Abstract: The present invention relates to a modulation and demodulation method of minimizing an error rate and applying it to a differential operation modulo 4. A modulation apparatus includes a Gray coding circuit 101 to which data of (2n+1) bits are inputted (where “n” is an integer more than 1) and which encodes 2 bits of an input signal of (2n+1) bits to a Gray code as a signal for allowing four quadrants to be identified, an encoding circuit 102 that encodes 3 bits of the input signal of (2n+1) bits as a signal indicating any one of eight subgroups provided in each of the four quadrants so that an average Hamming distance between adjacent subgroups within its quadrant becomes a minimum, and a mapping circuit 104 that maps binary data encoded by the Gray coding circuit 101 and the encoding circuit 102 on the four quadrants.

Abstract: A dual polarization transmission receiving system includes a reception unit including two RF local oscillators and a demodulation unit. The local oscillators receive signals transmitted by using two orthogonal polarized waves (V and H polarized waves) and convert the respective received signals into IF (Immediate Frequency) signals. The demodulation unit branches each IF signal into two paths, and then demodulates the respective IF signals for each polarized wave by a digital coherent detection scheme.

Abstract: The serial data signal obtained by carrying out an N/D conversion at two times the modulation speed is S/P-converted, at a data ratio of 1:2, into a pair of parallel data signals of the modulation speed. The demodulation process is carried out by parallelly processing the pair of parallel data signals, resulting in that the demodulation speed is equal to the modulation speed. The serial data obtained by carrying out the A/D conversion at four times the modulation speed is S/P-converted at a data ratio of 1:4, and is then similarly subjected to demodulation at the demodulation speed equal to the modulation speed. With this arrangement, the demodulator carrying out the digital signal processing can be applied to communication systems having a high modulation speed.

Abstract: A demodulator includes a pair of analog mixers for incoherently demodulating modulated orthogonal signals with orthogonal local carriers to produce a pair of analog baseband signals, there being a phase rotation in the analog orthogonal baseband signals resulting from the incoherent demodulation. The analog baseband signals are converted to first and second digital signals. One of these is scaled by a gain controlled circuitry so that a difference between the average power values of the scaled first digital signal and the second digital signal is zero. The inter-channel rotating phase contained in the outputs of the gain controlled circuitry is removed by a phase shifter.

Abstract: A clock synchronizing circuit of the present invention includes a first AD (Analog-to-Digital) converter for converting a first-channel baseband signal, which is subjected to orthogonal detection together with a second-channel baseband signal, to a first digital signal. A second AD converter converts the second-channel baseband signal to a second digital signal. A controller controls the sampling phase of the second AD converter on the basis of the first digital signal. A detector detects a shift of the sampling phase of the second digital signal relative to the first channel. An interpolator interpolates the second digital signal in accordance with a coefficient based on the shift of the sampling phase detected by the detector. Even when two channels of baseband circuits are different in electric length, the interpolator automatically, digitally cancels the difference. The circuit therefore prevents a BER (Bit Error Rate) characteristic from being degraded.

Abstract: A clock synchronizing circuit of the present invention includes a first AD (Analog-to-Digital) converter for converting a first-channel baseband signal, which is subjected to orthogonal detection together with a second-channel baseband signal, to a first digital signal. A second AD converter converts the second-channel baseband signal to a second digital signal. A controller controls the sampling phase of the second AD converter on the basis of the first digital signal. A detector detects a shift of the sampling phase of the second digital signal relative to the first channel. An interpolator interpolates the second digital signal in accordance with a coefficient based on the shift of the sampling phase detected by the detector. Even when two channels of baseband circuits are different in electric length, the interpolator automatically, digitally cancels the difference. The circuit therefore prevents a BER (Bit Error Rate) characteristic from being degraded.

Abstract: A demodulation device having a demodulating circuit that conducts the primary demodulation of received modulation wave, and a carrier recovery circuit that regenerates a carrier from demodulation signal by the demodulating circuit and conducts the secondary demodulation of baseband signal using the carrier.