Patents by Inventor Elena Potanina

Elena Potanina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9557757
    Abstract: Technologies are generally described for scaling a voltage regulator implemented as an integrated circuit (IC) that includes a power transistor configured to convert an input voltage to an output voltage, and a feedback loop configured to regulate the output voltage in response to a voltage change. At least one component of the voltage regulator may be selected for scaling, and a range of scaling factors may be identified for the component. An optimal coefficient may be determined for the scaling factors within the identified range through an empirical formulation and/or by running a circuit simulation based on parameters associated with voltage, load current, and load capacitance, for example. The optimal coefficient may be a coefficient that when applied to the component optimizes the performance of the IC and thus, the component may be scaled based on the optimal coefficient to achieve an optimized performance of the IC.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: January 31, 2017
    Assignee: Vivid Engineering, Inc.
    Inventors: Vladislav Potanin, Elena Potanina, George McLean, Pavel Biryulin
  • Patent number: 9454167
    Abstract: Technologies are generally described for a voltage regulator implemented as an integrated circuit (IC). The voltage regulator may include a power transistor configured to receive and convert an input voltage from a voltage source to an output voltage, and a feedback loop configured to regulate the output voltage in response to a change from a desired level. The feedback loop may include an error amplifier configured to determine and amplify a value difference between the output voltage and a reference output voltage, a voltage divider configured to generate voltage proportional to the output voltage such that a ratio is the value difference, and a first unity gain buffer configured to increase stability of the IC. In some examples, the feedback loop may include a second unity gain buffer and/or an overshoot suppressor circuit configured to reduce an output voltage fluctuation when a current consumed by the load is changed suddenly.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 27, 2016
    Assignee: VIVID ENGINEERING, INC.
    Inventors: Vladislav Potanin, Elena Potanina
  • Publication number: 20150349631
    Abstract: Technologies are generally described for scaling a voltage regulator implemented as an integrated circuit (IC) that includes a power transistor configured to convert an input voltage to an output voltage, and a feedback loop configured to regulate the output voltage in response to a voltage change. At least one component of the voltage regulator may be selected for scaling, and a range of scaling factors may be identified for the component. An optimal coefficient may be determined for the scaling factors within the identified range through an empirical formulation and/or by running a circuit simulation based on parameters associated with voltage, load current, and load capacitance, for example. The optimal coefficient may be a coefficient that when applied to the component optimizes the performance of the IC and thus, the component may be scaled based on the optimal coefficient to achieve an optimized performance of the IC.
    Type: Application
    Filed: February 3, 2015
    Publication date: December 3, 2015
    Inventors: Vladislav Potanin, Elena Potanina, George McLean, Pavel Biryulin
  • Publication number: 20150207406
    Abstract: Technologies are generally described for a voltage regulator implemented as an integrated circuit (IC). The voltage regulator may include a power transistor configured to receive and convert an input voltage from a voltage source to an output voltage, and a feedback loop configured to regulate the output voltage in response to a change from a desired level. The feedback loop may include an error amplifier configured to determine and amplify a value difference between the output voltage and a reference output voltage, a voltage divider configured to generate voltage proportional to the output voltage such that a ratio is the value difference, and a first unity gain buffer configured to increase stability of the IC. In some examples, the feedback loop may include a second unity gain buffer and/or an overshoot suppressor circuit configured to reduce an output voltage fluctuation when a current consumed by the load is changed suddenly.
    Type: Application
    Filed: May 27, 2014
    Publication date: July 23, 2015
    Applicant: Vivid Engineering, Inc.
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 8665668
    Abstract: Technologies are generally described for an integrated circuit that is designed to serve as the basis of SONAR sensors that provide high sensitivity, low noise, low cost, and electronically adjustable gain in a small package may incorporate transducer drivers and signal sensing functions. Electronically programmable gain of the circuit may provide flexibility in system designs for gain management, and eliminate a need for manual gain adjustments in production. Power may be supplied to the sensor(s) over a power line of the circuit from a direct current source through a resistor. The same line may also be used for communicating with the sensor(s). Data from the microcontroller may be transmitted to the sensor(s) using an open-drain driver transistor and received through another transistor isolating the micro-controller's input from potentially high voltages present on the power line.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: March 4, 2014
    Assignee: Vivid Engineering, Inc.
    Inventors: Vladislav Potanin, Alexander Burinskiy, Elena Potanina
  • Publication number: 20120069712
    Abstract: Technologies are generally described for an integrated circuit that is designed to serve as the basis of SONAR sensors that provide high sensitivity, low noise, low cost, and electronically adjustable gain in a small package may incorporate transducer drivers and signal sensing functions. Electronically programmable gain of the circuit may provide flexibility in system designs for gain management, and eliminate a need for manual gain adjustments in production. Power may be supplied to the sensor(s) over a power line of the circuit from a direct current source through a resistor. The same line may also be used for communicating with the sensor(s). Data from the microcontroller may be transmitted to the sensor(s) using an open-drain driver transistor and received through another transistor isolating the micro-controller's input from potentially high voltages present on the power line.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 22, 2012
    Applicant: VIVID ENGINEERING, INC.
    Inventors: Vladislav Potanin, Alexander Burinskiy, Elena Potanina
  • Patent number: 7560899
    Abstract: A method and circuit for adjusting a safety time-out in charging devices based on a charge current. According to one embodiment, a signal that is based on the charge current is employed to control an output of an oscillator, which controls an operation of a safety timer circuit. The safety timer circuit activates or deactivates a voltage-current (V-I) control loop of the charging device providing the safety time-out based on the charge current. In another embodiment, where a digital current-set circuit may be employed to determine a value of the charge current, a Digital-to-Analog Converter (DAC) may provide the charge current limit to the V-I control loop, and another output of the digital current-set circuit may control the safety timer. In a further embodiment, a signal based on the charge current may be digitized and employed to control the safety timer comprising a time-out counter.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: July 14, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina, Igor Furlan
  • Patent number: 7498769
    Abstract: A circuit for battery charging is provided. The circuit provides a charge current to a battery, and regulates the charge current with either linear regulation or switching regulation, based on operating conditions. In one embodiment, if the input voltage minus the battery voltage is less than a threshold (e.g. 100 mV), linear regulation is employed, and if the input voltage minus the battery voltage is greater than the threshold (e.g. 100 mV), switching regulation is employed. The threshold may be fixed, or the threshold may be adjustable based on die temperature or charge current.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: March 3, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7459886
    Abstract: A method and circuit for simultaneously charging a battery and providing supply voltage to a load. The circuit includes a low-drop-out voltage (LDO) regulator and a constant-current, constant-voltage (CC-CV) regulator. In one embodiment, CC-CV regulator provides a control voltage to the LDO regulator generated by a voltage-controlled current source. As charge voltage approaches battery termination voltage, the control voltage is reduced regulating LDO regulator output to provide constant voltage while decreasing charge current to the battery. In another embodiment, a slow response amplifier and a current mirror in the CC-CV regulator provide a smooth and stable charging current to the battery that is decreased as battery charge approaches a full charge level, while maintaining constant supply voltage to the load. In a further embodiment, an externally programmable amplifier in the CC-CV regulator may enable use of the circuit with varying power sources.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: December 2, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7453245
    Abstract: A method for providing precise current regulation and limitation for a power supply is provided. The method includes amplifying any difference between a load current signal and a current setting reference signal with a feedback loop amplifier to generate a feedback signal. A power output signal is generated based on the feedback signal. An output signal for the power supply is generated based on the power output signal. The load current signal and the current setting reference signal are generated based on the power output signal. An offset error signal is generated based on the load current signal and the current setting reference signal. A differential bias for the feedback loop amplifier is adjusted based on the offset error signal.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: November 18, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7436152
    Abstract: A charge current control system is disclosed. One embodiment of the present invention includes a voltage detecting component that determines whether voltage stored by a load is at a voltage threshold. Also included are current supplying components that supply a charge current to the load that attains a plurality of magnitudes. The supply of the charge current is facilitated by a single charge current pass component over the course of a charge cycle. The magnitude of the charge current is based on the outcome of a determination of whether the minimum voltage threshold is reached.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 14, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7394309
    Abstract: Balanced offset compensation is provided for a differential amplifier circuit. Two sets of three switches are employed between respective inputs and outputs of the differential amplifier to shunt the outputs to the input terminals during auto-zeroing phase. By opening and closing different combinations of the switches during auto-zeroing and operation phases, differential degradation due to unbalanced leakage currents is substantially reduced.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: July 1, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7388447
    Abstract: A method and circuit for stabilizing a frequency of a clock generator comprising a ring oscillator with respect to manufacturing process variations and a circuit temperature. A bias circuit comprising a current mirror and cascade circuits provides a compensated bias current based on a gate source voltage and drain source voltage of an output transistor, where the two voltages are independent of transistor parameters and circuit temperature. As a result, the ring oscillator frequency is stabilized with respect to those parameters.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: June 17, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7336464
    Abstract: A power limiting circuit is disclosed. The power limiting circuit includes a temperature sensing circuit that outputs a temperature signal that is proportional to temperature over a temperature range. The power limiting circuit also includes a regulation circuit coupled to the temperature sensing circuit and controlled by the temperature signal. The regulation circuit operates in a manner that is proportional to the temperature.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: February 26, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7317297
    Abstract: A method for communicating with portable device batteries is described. Many portable devices such as cellular phones may employ a wide variety of batteries with different types, capabilities, and the like. Batteries may be retrofitted with additional circuitry that is arranged to provide information about the battery such as capacity, type, charging status, and the like to the portable device. However, additional pins for communication between the battery and the portable device may increase manufacturing cost, reduce reliability, and the like. In addition, many batteries nowadays have a resistor between their ground pin and temperature sense pin that may be used for sensing temperature of the battery as well as providing battery type information to the portable device. The present invention employs a one wire transceiver using the existing temperature sense pin and the resistor, thereby allowing additional information exchange with the battery without increasing manufacturing cost or reducing reliability.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: January 8, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Igor Furlan, Vladislav Potanin, Elena Potanina
  • Patent number: 7253589
    Abstract: A circuit for charging a battery by selecting among two available power sources while providing overcharging and temperature protection to the battery and managing a charging current is described. A power pass and sense circuit is arranged to provide charge voltage from either power source based on control voltages from a current/voltage control circuit, which receives control signals from a logic control and timer circuit, a sensed voltage from a current setting circuit and reference and temperature voltages from a voltage reference and thermo-sense circuit. Differential amplifiers controlling power pass transistors are turned on and off depending on a power source availability and selection. A power supply circuit provides global supply voltages to all subcircuits preventing reverse current to power sources and stable supply independent of a power source availability. A pair of transistors arranged to operate as body-switcher protect power pass and sense transistors against reverse bias current.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: August 7, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina, Khosrow Vijeh, Richard Dye
  • Patent number: 7176664
    Abstract: A method for providing precise current regulation and limitation for a power supply is provided. The method includes amplifying any difference between a load current signal and a current setting reference signal with a feedback loop amplifier to generate a feedback signal. A power output signal is generated based on the feedback signal. An output signal for the power supply is generated based on the power output signal. The load current signal and the current setting reference signal are generated based on the power output signal. An offset error signal is generated based on the load current signal and the current setting reference signal. A differential bias for the feedback loop amplifier is adjusted based on the offset error signal.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: February 13, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7161393
    Abstract: A method and circuit for providing a regulated current to a load stabilized with respect to the load current, a load voltage, and a circuit temperature. The circuit includes a power pass device, a current sense device, a voltage sense amplifier, a reference device, a temperature sense device, and a current control device. In one embodiment, the current control device receives a first signal based on the sensed load current, a second signal based on the sensed load voltage, a third signal based on the circuit temperature, and a reference signal. A lesser of the second, third, and reference signals is selected and differentially combined with the first signal. A control signal is derived from the combination to control a regulation of the load current. In a further embodiment, an external signal may be provided to the current control device for stabilization with respect to an external parameter.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: January 9, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7102415
    Abstract: A current is provided from a power source to a load through a pass circuit that is series coupled to a sense resistor. A current trip-point detection circuit is arranged to detect a change in the current that is provided to a load. The current trip-point detection circuit includes at least two resistors that are series coupled from the sense resistor to a current source. A comparator compares a sense voltage to a tap-point between the two resistors such that the comparator asserts a trip-point detection signal when the current to the load reaches a predetermined threshold. The sense voltage can correspond to the voltage across the load or some other voltage that is proportional to the voltage across the load. The circuit arrangement has a simplified design that sets the trip-point as a percentage of the maximum output current. The current level trip-point can be temperature compensated.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: September 5, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7061210
    Abstract: A current trip point detection circuit includes a transistor, a series of resistors, an amplifier, a comparator, and a series of switching circuits. The first transistor and the resistors are configured as an inverting gain stage. The amplifier cooperates with the first transistor to operate in a negative feedback arrangement. The gain in the feedback loop is adjusted by selective activation of additional transistors, where each additional transistor lowers the overall loop gain. The comparator is selectively coupled to a tap point in a voltage divider that is formed by resistors. The voltage divider tap point is selected to set a threshold for detection. The trip point is detected by the comparator, and may be adjusted between high and low trip points through the various configurations of the gain and voltage divider tap points via the switching circuits.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: June 13, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina