Abstract: This invention discloses an anti-charging layer for beam lithography and mask fabrication. This invention reduces beam displacement and increases pattern placement accuracy. The process will be used in the beam fabrication of high-resolution lithographic masks as well as beam direct write lithography of electronic devices. The anti-charging layer is formed by the use of metal films bound to metal ligating self-assembled monolayers (SAMs) as discharge layers.

Abstract: This invention discloses an anti-charging layer for beam lithography and mask fabrication. This invention reduces beam displacement and increases pattern placement accuracy. The process will be used in the beam fabrication of high-resolution lithographic masks as well as beam direct write lithography of electronic devices. The anti-charging layer is formed by the use of metal films bound to metal ligating self-assembled monolayers (SAMs) as discharge layers.

Abstract: This invention discloses an anti-charging layer for beam lithography and mask fabrication. This invention reduces beam displacement and increases pattern placement accuracy. The process will be used in the beam fabrication of high-resolution lithographic masks as well as beam direct write lithography of electronic devices. The anti-charging layer is formed by the use of metal films bound to metal ligating self-assembled monolayers (SAMs) as discharge layers.

Abstract: Improvement in resolution in terms of minimum feature sizes and proximity fects in an electronic mask is attained by making the mask using a high voltage electron beam which deflects or blocks backscattered electrons. The novel mask structure comprises a transparent support, an absorber layer disposed on said support, a dielectric layer disposed on said absorber layer, and a resist layer disposed on said dielectric layer. It is the dielectric layer which is credited for improving resolution in said mask which can be used a multiple number of times in printing a pattern for various applications, including electronic devices and integrated circuits.

Abstract: An apparatus and method lithographically patterns an imaging layer using a predetermined pattern. The apparatus includes a cantilever having a tip attached thereto, which tip includes a conductive or semiconductive material. The apparatus also includes a scanning probe controller connected to the cantilever, which maintains the tip in contact with the imaging layer to be patterned. Substantially while the scanning probe controller maintains the tip in contact with the imaging layer, a voltage and/or current generator coupled to the tip selectively generates a voltage and/or current between the tip and the imaging layer to affect a physical change in the imaging layer based on the predetermined pattern. The physical change in the imaging layer can be exploited to fabricate integrated circuits, lithographic masks or micromechanical devices, for example. The scanning probe controller can also measure the topographical change in the imaging layer caused by the physical change using the same cantilever and tip.

Abstract: Improvement of resolution in terms of reducing minimum feature sizes and ximity effects on bulk substrates in high voltage electron beam lithography as applied to manufacture of electronic circuits from coated semiconductors involves the use of a dielectric layer interposed between an electrically semiconducting substrate and a resist layer. The dielectric layer functions to reduce the resist exposure resulting from the backscattered electrons coming from the substrate into the resist layer.