Patents by Inventor Emerson S. Fang
Emerson S. Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11750325Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.Type: GrantFiled: July 20, 2020Date of Patent: September 5, 2023Assignee: Apple Inc.Inventors: Jafar Savoj, Praveen R. Singh, Brian S. Leibowitz, Emerson S. Fang
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Publication number: 20220100220Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Inventors: Ali Mesgarani, Ke Yun, Seyedeh Sedigheh Hashemi, Jasdeep S. Dhaliwal, Mansour Keramat, Jafar Savoj, Bruno W. Garlepp, Vahid Majidzadeh Bafar, Emerson S. Fang
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Publication number: 20210398980Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: ApplicationFiled: June 25, 2021Publication date: December 23, 2021Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Patent number: 11063046Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: GrantFiled: August 1, 2019Date of Patent: July 13, 2021Assignee: Apple Inc.Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Patent number: 11023403Abstract: A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.Type: GrantFiled: December 2, 2019Date of Patent: June 1, 2021Assignee: Apple Inc.Inventors: Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Brian S. Leibowitz, Pradeep R. Trivedi, Gin Yee, Emerson S. Fang
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Publication number: 20210099252Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.Type: ApplicationFiled: July 20, 2020Publication date: April 1, 2021Inventors: Jafar Savoj, Praveen R. Singh, Brian S. Leibowitz, Emerson S. Fang
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Patent number: 10756849Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.Type: GrantFiled: January 21, 2019Date of Patent: August 25, 2020Assignee: Apple Inc.Inventors: Jafar Savoj, Praveen R. Singh, Brian S. Leibowitz, Emerson S. Fang
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Publication number: 20200235856Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.Type: ApplicationFiled: January 21, 2019Publication date: July 23, 2020Inventors: Jafar Savoj, Praveen R. Singh, Brian S. Leibowitz, Emerson S. Fang
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Publication number: 20200183874Abstract: A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.Type: ApplicationFiled: December 2, 2019Publication date: June 11, 2020Inventors: Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Brian S. Leibowitz, Pradeep R. Trivedi, Gin Yee, Emerson S. Fang
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Publication number: 20200027881Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: ApplicationFiled: August 1, 2019Publication date: January 23, 2020Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Patent number: 10521391Abstract: A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.Type: GrantFiled: November 29, 2018Date of Patent: December 31, 2019Assignee: Apple Inc.Inventors: Jafar Savoj, Jose A. Tierno, Sanjeev K. Maheshwari, Brian S. Leibowitz, Pradeep R. Trivedi, Gin Yee, Emerson S. Fang
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Patent number: 10411012Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: GrantFiled: July 23, 2018Date of Patent: September 10, 2019Assignee: Apple Inc.Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Publication number: 20180366466Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: ApplicationFiled: July 23, 2018Publication date: December 20, 2018Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Patent number: 10056384Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: GrantFiled: January 31, 2017Date of Patent: August 21, 2018Assignee: Apple Inc.Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Patent number: 9720033Abstract: An apparatus and method for performing on-chip parameter measurement is disclosed. In one embodiment, an IC includes a number of functional circuit blocks each having one or more sensors for measuring parameters such as voltage and temperature. Each of the functional blocks includes circuitry coupled to receive power from a local supply voltage node. Similarly, the circuitry in each of the sensors is also coupled to receive power from the corresponding local supply voltage node. Each of the sensors may be calibrated to compensate for process, voltage, and temperature variations. Various methods based on characterization of the sensors may be used to perform the calibrations.Type: GrantFiled: September 29, 2015Date of Patent: August 1, 2017Assignee: Apple Inc.Inventors: Jafar Savoj, Brian S. Leibowitz, Emerson S. Fang
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Publication number: 20170141116Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: ApplicationFiled: January 31, 2017Publication date: May 18, 2017Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Publication number: 20170089975Abstract: An apparatus and method for performing on-chip parameter measurement is disclosed. In one embodiment, an IC includes a number of functional circuit blocks each having one or more sensors for measuring parameters such as voltage and temperature. Each of the functional blocks includes circuitry coupled to receive power from a local supply voltage node. Similarly, the circuitry in each of the sensors is also coupled to receive power from the corresponding local supply voltage node. Each of the sensors may be calibrated to compensate for process, voltage, and temperature variations. Various methods based on characterization of the sensors may be used to perform the calibrations.Type: ApplicationFiled: September 29, 2015Publication date: March 30, 2017Inventors: Jafar Savoj, Brian S. Leibowitz, Emerson S. Fang
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Patent number: 9595526Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.Type: GrantFiled: November 12, 2013Date of Patent: March 14, 2017Assignee: Apple Inc.Inventors: Jared L. Zerbe, Emerson S. Fang, Jun Zhai, Shawn Searles
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Patent number: 9397567Abstract: A method and apparatus for augmenting an external voltage regulator with a shunt integrated voltage regulator is disclosed. In one embodiment, an integrated circuit (IC) includes a load circuit coupled to a supply voltage node. The supply voltage node is electrically coupled to receive a supply voltage from an external voltage regulator. The IC also includes a shunt integrated voltage regulator coupled to the supply voltage node and implemented on the same IC die as the load circuit. If the supply voltage falls below a specified value (e.g., to increased current demand), the integrated voltage regulator may begin supplying current to the load. This may cause the supply voltage to return to within its specified range of the specified value, while allowing the external voltage regulator sufficient time to respond to the increased current demand. Thus, voltage droops on the supply voltage node may be minimized.Type: GrantFiled: May 27, 2014Date of Patent: July 19, 2016Assignee: Apple Inc.Inventors: Shawn Searles, Emerson S Fang
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Patent number: 9274534Abstract: A voltage regulator includes a pass element having a control input coupled to a control node and operable to generate an output voltage at an output node, a negative feedback amplifier operable to receive a reference voltage and the output voltage and generate a signal at the control node based on a difference between the reference voltage and the output voltage, and a noise cancellation circuit coupled to the control node and the output node and operable to generate a bias current at the control node based on the output voltage.Type: GrantFiled: December 21, 2012Date of Patent: March 1, 2016Assignee: Advanced Micro Devices, Inc.Inventors: Emerson S. Fang, Alvin Leng Sun Loke