Patents by Inventor Emory Garth

Emory Garth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Three-dimensional stack manufacture for integrated circuit devices and method of manufacture
    Patent number: 7476963
    Abstract: An integrated circuit package assembly formed by stacking flip-chip mounted substrates interleaved with precisely dimensioned spacers and then bonded by injection molding the stack. The sides of the stack are sawed off to expose vias in the substrates, and multilevel-interconnect substrates are precisely aligned on the sides of the stack. Solder pads on the interconnect substrates are reflowed to form a solder connection to the exposed vias, allowing complex interconnection between diverse points along the edge connectors of each substrate. In one embodiment, solder balls are reflowed on ball-grid-array pads at the top of the stack to provide external electrical connections.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: January 13, 2009
    Inventor: Emory Garth
  • Three-dimensional stack manufacture for integrated circuit devices and method of manufacture
    Publication number: 20070035003
    Abstract: An integrated circuit package assembly formed by stacking flip-chip mounted substrates interleaved with precisely dimensioned spacers and then bonded by injection molding the stack. The sides of the stack are sawed off to expose vias in the substrates, and multilevel-interconnect substrates are precisely aligned on the sides of the stack. Solder pads on the interconnect substrates are reflowed to form a solder connection to the exposed vias, allowing complex interconnection between diverse points along the edge connectors of each substrate. In one embodiment, solder balls are reflowed on ball-grid-array pads at the top of the stack to provide external electrical connections.
    Type: Application
    Filed: October 17, 2006
    Publication date: February 15, 2007
    Inventor: Emory Garth
  • Three-dimensional stack manufacture for integrated circuit devices and method of manufacture
    Publication number: 20060071316
    Abstract: An integrated circuit package assembly formed by stacking flip-chip mounted substrates interleaved with precisely dimensioned spacers and then bonded by injection molding the stack. The sides of the stack are sawed off to expose vias in the substrates, and multilevel-interconnect substrates are precisely aligned on the sides of the stack. Solder pads on the interconnect substrates are reflowed to form a solder connection to the exposed vias, allowing complex interconnection between diverse points along the edge connectors of each substrate. In one embodiment, solder balls are reflowed on ball-grid-array pads at the top of the stack to provide external electrical connections.
    Type: Application
    Filed: September 24, 2004
    Publication date: April 6, 2006
    Inventor: Emory Garth