Abstract: A system and method for concurrent operations in a microcontroller's program memory is provided. In one exemplary embodiment, a microcontroller system is provided that includes a microcontroller, programmable read-only memory (PROM), random access memory (RAM) and a bridge circuit disposed between the PROM and microcontroller. The bridge is adapted with memory-mapped registers to map specific address locations from RAM to PROM, to permit the microcontroller to update PROM while concurrently executing code from RAM. In another exemplary embodiment, the bridge circuitry includes microcontroller reset and RAM enable/disable capabilities to further efficiently manage memory resources.

Abstract: A system and method is provided for multiple hosts to control one or more power systems redundantly, by constructing a power supply system having a plurality of physically separate and redundant communication interfaces, one coupled to each host, wherein a software algorithm determines whether the power supply system should be on or off at a given point in time, based on signals received from the hosts. In an exemplary embodiment, a power control system consistent with the invention comprises at least two hosts, each host comprising a host communications interface; and a power supply system comprising a power supply, control software, and a plurality of power supply system communications interfaces.

Abstract: A system and method for verifying integrity of data signals communicated from a data transmit device to a receive device over a communications channel of limited bandwidth. The method comprising steps of: a) detecting instances of idle data transmit activity at the transmit device; b) accumulating data integrity information for data transmitted over the communication channel between detected idle transmit instances, the accumulating being performed by data integrity verifier devices at both transmit and receive devices; c) communicating accumulated data integrity information for data transmitted since a last detected idle data transmit instance during a current detected idle data transmit instance; and, d) verifying accumulated data integrity information communicated over the channel at the receiver device.

Abstract: Provided are a method, system and article of manufacture for data communications. A transmitter transmits a plurality of packets, wherein each packet is transmitted after a time interval. A receiver receives at least one part of the plurality of packets. The receiver determines whether all parts of a packet are received before expiration of the time interval, wherein the received packet is valid if all parts are received before the expiration of the time interval.

Abstract: An arbitration system and process is provided to arbitrate usage of a shared resource. The system and process dynamically adjust to changing workloads and includes artificial intelligence to learn from experience how to optimize system throughput. In system form, the present invention provides a resource arbitration system that includes an arbitration controller adapted to monitor a resource used by a plurality of agents and adapted to calculate an optimal usage of said resource for each agent. The controller also generates grant control signals to each agent to couple agents to the resource based on the calculated optimal usage for each agent.

Abstract: A programmable logic circuit is provided that solves glitch problems associated with asynchronous logic operations associated with conventional look-up tables by utilizing a preset dominant transparent latch element to replace a conventional look-up table. Since latch elements are normally present in programmable logic circuits (e.g., FPGAs) no additional circuitry is necessary to implement the approach of the present invention. In one exemplary embodiment, an FPGA is provided which includes an array of programmable latch elements, and an array of programmable flip-flop elements generating flip-flop output signals. One or more of the latch elements are programmed to form a preset dominant transparent latch (PDTL) such that the data signals are coupled to the data inputs and preset inputs of the latch. In this manner, the latch operates to replace conventional look-up tables by operating as a primitive OR or NOR gate to generate a desired output.

Abstract: The invention provides a method of making a stopper (2) of cork of natural and/or synthetic origin for a bottle of sparkling wine of the Champagne type, said stopper (2) having a base suitable for constituting a fraction of the inside wall (17) of said bottle (6) and an outside wall (30) suitable for bearing against the inside wall (24) of the neck (4). The method consists: in acting during closure of said bottle (6) to deform said outside wall (30) of said stopper (2) longitudinally over at least a portion extending to its base, so as to provide at least one channel-forming groove (18, 33) in said stopper; and in maintaining the longitudinal deformation throughout the period said bottle (6) is closed by said stopper (2) so that said channel-forming groove (18, 33) persists when said bottle is partially opened.

Abstract: A system and method is provided for multiple hosts to control one or more power systems redundantly, by constructing a power supply system having a plurality of physically separate and redundant communication interfaces, one coupled to each host, wherein a software algorithm determines whether the power supply system should be on or off at a given point in time, based on signals received from the hosts. In an exemplary embodiment, a power control system consistent with the invention comprises at least two hosts, each host comprising a host communications interface; and a power supply system comprising a power supply, control software, and a plurality of power supply system communications interfaces.

Abstract: A system and method for concurrent operations in a microcontroller's program memory is provided. In one exemplary embodiment, a microcontroller system is provided that includes a microcontroller, PROM, RAM, and a bridge circuit disposed between the PROM and microcontroller. The bridge is adapted with memory-mapped registers to map specific address locations from RAM to PROM, to permit the microcontroller to update PROM while concurrently executing code from RAM. In another exemplary embodiment, the bridge circuitry includes microcontroller reset and RAM enable/disable capabilities to further efficiently manage memory resources.

Abstract: A programmable logic circuit is provided that solves glitch problems associated with asynchronous logic operations associated with conventional look-up tables by utilizing a preset dominant transparent latch element to replace a conventional look-up table. Since latch elements are normally present in programmable logic circuits (e.g., FPGAs) no additional circuitry is necessary to implement the approach of the present invention. In one exemplary embodiment, an FPGA is provided which includes an array of programmable latch elements, and an array of programmable flip-flop elements generating flip-flop output signals. One or more of the latch elements are programmed to form a preset dominant transparent latch (PDTL) such that the data signals are coupled to the data inputs and preset inputs of the latch. In this manner, the latch operates to replace conventional look-up tables by operating as a primitive OR or NOR gate to generate a desired output.

Abstract: To exchange a digital data input stream, a transmitter sends the digital data input stream to a receiver, and the receiver sequentially divides the stream into different interleaved substreams and later combines the substreams to provide an output including the original digital data input stream. The original digital data input stream includes multiple subgroups of data, such as bytes. Each subgroup is stored in a selected buffer of the receiver. Buffers are selected in a predetermined order of rotation to store sequentially received subgroups. Thus, each buffer receives subgroups in a defined order. Later, each buffer outputs its stored subgroups in the same order as received. A data assembler assembles the subgroups output by the various buffers, reconstructing the original digital input stream.

Abstract: A charge-coupled imaging device (FIG. 3) is thinned to allow for backside illumination. The device is further enhanced using ion implantation techniques to establish an electrical field (44) at the back surface, which functions to drive free electrons to potential wells generated beneath a gate structure (40) on the front surface. The device structure allows for both front side and backside illumination and is useful as a imaging device in applications where it is necessary to combine images from two different optical sources. The imaging device is particularly useful in terrestrial guidance systems (FIG. 5) where the imaging device is used to detect guide stars from a large guide star field. In such systems, the imaging device must be translated within an X-Y plane in order to cover the entire guide star field. In order to accurately know the position of the imaging device, optical fiducial marks are imaged onto a side of the imaging device opposite the side receiving the guide star photons.

Abstract: To exchange a digital data input stream, a transmitter sends the digital data input stream to a receiver, and the receiver sequentially divides the stream into different interleaved substreams and later combines the substreams to provide an output including the original digital data input stream. The original digital data input stream includes multiple subgroups of data, such as bytes. Each subgroup is stored in a selected buffer of the receiver. Buffers are selected in a predetermined order of rotation to store sequentially received subgroups. Thus, each buffer receives subgroups in a defined order. Later, each buffer outputs its stored subgroups in the same order as received. A data assembler assembles the subgroups output by the various buffers, reconstructing the original digital input stream.

Abstract: A data transmission system includes a sender and a receiver, both employing different clock rates and a data bus coupled between the sender and the receiver for transmitting signals therebetween. The receiver generates an enable signal from the receiver clock to control data transmission at the sender. The enable signal is a pulse generated at each rising edge of the receiver clock and corresponds to the data transfer rate of the receiver clock. A detector module, located at the sender, receives and captures the asynchronous enable signal and initiates transmission of one data byte for each pulse of the enable signal, thereby automatically adjusting the data transfer rate of the sender to the data transfer rate of the receiver.

Abstract: The subject of the invention is a mineral wool composition capable of dissolving in a physiological medium which comprises the constituents below, having to the following percentages by weight:______________________________________ (CaO + MgO + BaO + Na.sub.2 O + K.sub.2 O + B.sub.2 O.sub.3) > 30* 2 .times. Al.sub.2 O.sub.3 RO 13.5 to 19.5% R.sub.2 O 14.2 to 23% RO/R.sub.2 O 0.70 to 0.95 CaO/MgO > 1.5 SiO.sub.2 47 to 58.5% Al.sub.2 O.sub.3 0 to 3.5% B.sub.2 O.sub.3 5 to 10% Fe.sub.2 O.sub.3 (total iron) 0 to 3.0% ______________________________________where:RO means oxides of the elements from column 2a of the Periodic Table, including CaO, MgO, BaO and SrO; and R.sub.2 O means oxides from column 1a of the Periodic Table, including Na.sub.2 O, K.sub.2 O and Li.sub.2 O.

Abstract: A fastening assembly for securing objects to a masonry body, such as shutter assemblies used to secure building windows, that includes a screw member, an anchorage assembly, an insert assembly partially housed within the anchorage assembly and a bushing ring coaxially journaling the screw member adjacent to the head. Thick grease is packed with the bushing ring to seal the internal components from the elements. The bushing ring has an internal through opening with two internal diameters. One of them, adjacent to the screw head being slightly larger than the shank of the screw in order to seal the rest of the components from the elements. The other end of the internal through opening being larger so that a portion of the insert member can penetrate therein when the assembly is tightened.

Abstract: A security device for a steering wheel is disclosed. Such device comprises at least one elongated primary rod positioned in contact with the upper surface of a steering wheel adjacent to one side thereof at a first location. The device includes an L-shaped member extending radially inward with respect to the position of contact with respect to the steering wheel. The L-shaped member includes a downwardly extending portion and a radially outboardly extending portion, the rod having an enlarged handle at its radially outboard end. An intermediate support has a pair of support barrels with a first end attached to the inboard end of the primary rod and a cross piece coupling the support barrels. Each support barrel has a second end with a cylindrical bore. A pair of similarly shaped independent secondary rods is provided, each formed with a plurality of concentric circumferential recesses.

Abstract: A method for fabricating thinned, back-illuminated, solid state image sensors 10 includes steps of positively doping a bottom surface 22 of a top semiconductor wafer 24, and bonding the bottom surface 22 of the top semiconductor wafer 24 to a top surface 26 of a bottom semiconductor wafer 28 with a silicon dioxide passivation layer 34 in between. The top wafer 24 is thinned and an insulating layer of silicon dioxide 36 and a polysilicon gate structure 38 are formed thereover. Individual dies 40 are then formed, which are bonded to a substrate 42 along each pixel face. The bottom semiconductor wafer layer 28 is etched away to expose the silicon dioxide passivation layer 34, which acts to protect the thinned top wafer layer 24. The dies 40 are then etched to expose bonding pads within the gate structure 38, and sized to create thinned, back-illuminated, solid state image sensors 10.

Abstract: A standard thick silicon charge-coupled device (FIG. 1A) has its pixel face mounted to a transparent, optically flat glass substrate using a thin layer of thermoset epoxy. The backside silicon of the charge-coupled device is thinned to 10 .+-.0.5 um using a two-step chemi-mechanical process. The bulk silicon is thinned to 75 um with a 700 micro-grit aluminium oxide abrasive and is then thinned and polished to 10 um using 80 nm grit colloidal silica. Access from the backside to the aluminum bonding pads (36 of FIG. 5) of the device is achieved by photolithographic patterning and reactive ion etching of the silicon above the bonding pads. The charge-coupled device is then packaged and wire-bonded in a structure which offers support for the silicon membrane and allows for unobstructed backside illumination.