Abstract: In accordance with one aspect of the present description, a node of the distributed computing system has multiple communication paths to a data processing resource lock which controls access to shared resources, for example. In this manner, at least one redundant communication path is provided between a node and a data processing resource lock to facilitate reliable transmission of data processing resource lock signals between the node and the data processing resource lock. Other features and aspects may be realized, depending upon the particular application.

Abstract: In accordance with one aspect of the present description, a node of the distributed computing system has multiple communication paths to a data processing resource lock which controls access to shared resources, for example. In this manner, at least one redundant communication path is provided between a node and a data processing resource lock to facilitate reliable transmission of data processing resource lock signals between the node and the data processing resource lock. Other features and aspects may be realized, depending upon the particular application.

Abstract: A mechanism is provided for moving control of storage devices from one adapter pair to another. In a trunked disk array configuration, moving the storage devices from one disk array to another disk array begins by attaching the downstream ports of the two independent disk arrays together. The mechanism redefines one set of the ports as upstream ports and through switch zoning makes a set of devices available to the second disk array adapters. By controlling zoning access and performing discovery one device port at a time, the mechanism transfers access and ownership of the RAID group from one adapter pair to another.

Abstract: An apparatus, system, and method are disclosed for resetting and bypassing microcontroller stations. A command module asserts and de-asserts a reset line in response to a command. A reset module resets a microcontroller station if the command module asserts and de-asserts the reset line within a time interval. In addition, the reset module bypasses the microcontroller station if the command module asserts and holds the reset line for a time period exceeding the time interval.

Abstract: A mechanism is provided for moving control of storage devices from one adapter pair to another. In a trunked disk array configuration, moving the storage devices from one disk array to another disk array begins by attaching the downstream ports of the two independent disk arrays together. The mechanism redefines one set of the ports as upstream ports and through switch zoning makes a set of devices available to the second disk array adapters. By controlling zoning access and performing discovery one device port at a time, the mechanism transfers access and ownership of the RAID group from one adapter pair to another.

Abstract: An apparatus, system, and method are disclosed for reliably controlling an I/O enclosure. A bus module receives two or more Peripheral Component Interconnect Express (“PCIe”) sideband signals via one or more PCIe cables. The one or more PCIe cables are connected between one or more hosts and an I/O enclosure. A decode module determines an asserted value of each of the two or more PCIe sideband signals and combines the PCIe sideband signal asserted values to form a bus value. Each PCIe sideband signal represents a bit in the bus value, and the bus value specifies a command for controlling the I/O enclosure. An execution module executes the specified command to perform control actions on the I/O enclosure.

Abstract: An apparatus, system, and method are disclosed for reliably controlling an I/O enclosure. A bus module receives two or more Peripheral Component Interconnect Express (“PCIe”) sideband signals via one or more PCIe cables. The one or more PCIe cables are connected between one or more hosts and an I/O enclosure. A decode module determines an asserted value of each of the two or more PCIe sideband signals and combines the PCIe sideband signal asserted values to form a bus value. Each PCIe sideband signal represents a bit in the bus value, and the bus value specifies a command for controlling the I/O enclosure. An execution module executes the specified command to perform control actions on the I/O enclosure.

Abstract: The present disclosure is directed to a method for providing serial peripheral interface (SPI) access in an IO enclosure. The method may comprise receiving a SPI access request at a bus interface unit; sending the SPI access request to a register bus, the register bus connecting an internal ROM, at least one status register, and at least one control register; fetching from the internal ROM when the SPI access request is a read request for configuration information; reading from the at least one status register when the SPI access request is a read request for at least one of an indicator, a sensor, or a controller within the IO enclosure; and writing to the at least one control register when the SPI access request is a write request for at least one of the indicator, the sensor, or the controller within the IO enclosure.

Abstract: An apparatus, system, and method are disclosed for redundant device management. The apparatus is provided with a plurality of modules configured to functionally execute the necessary steps of receiving a communication message, determining whether an address associated with the communication message designates a local processor as a destination for the communication message, wherein the address is stored in an address field associated with the communication message, and transmitting the communication message to a remote device. These modules in the described embodiments include a transmitter module, a receiver module, and an addressing module.

Abstract: An apparatus, system, and method are disclosed for resetting and bypassing microcontroller stations. A command module asserts and de-asserts a reset line in response to a command. A reset module resets a microcontroller station if the command module asserts and de-asserts the reset line within a time interval. In addition, the reset module bypasses the microcontroller station if the command module asserts and holds the reset line for a time period exceeding the time interval.

Abstract: A method for providing redundant management of fans within a shared enclosure, comprising: detecting for an abnormal cooling condition in an enclosure configured for housing a first server having a first fan and a second server having a second fan; operating the first fan and the second fan to run at a nominal power state; and enabling the first server to assert the first fan to operate from the nominal power state to the high power state while enabling the first server to unconditionally force the second fan of the second server to operate from the nominal power state to a high power state through an overriding mechanism in the second server when the abnormal cooling condition is detected in the enclosure, the overriding mechanism being coupled to the first server.

Abstract: A lighting circuit for energizing an indicating light on a device coupled to a host, the circuit including a flasher circuit of the host; a fault detection circuit of the device; and an XNOR gate for receiving input from the flasher circuit and the fault detection circuit wherein the lighting circuit is adapted for energizing the indicating light and causing the indicating light to flash in the presence of a fault signal from the fault detection circuit

Abstract: A power supply system for reducing input ripple voltage, the system including: a first regulator having at least two inputs, one input being a voltage input pin and another input being a synchronization pin; a second regulator having at least two inputs, one input being a voltage input pin and another input being a synchronization pin; a Nth regulator having at least two inputs, one input being a voltage input pin and another input being a synchronization pin; wherein outputs of the first regulator, second regulator, and Nth regulator are connected to a single power bus or correspondingly to separate power buses; a first delay connected to the synchronization pin of the second regulator; a second delay connected to the synchronization pin of the Nth regulator; wherein the first delay and the second delay have different delays configured for enabling the first regulator, second regulator, and the Nth regulator to operate out of phase; and a master clock for providing timing control to the first and second dela

Abstract: A power supply system for reducing input ripple voltage, the system including: a first switching regulator having at least two input pins, one input pin being a voltage input pin and another input pin being a synchronization input pin; a second switching regulator having at least two input pins, one input pin being a voltage input pin and another input pin being a synchronization input pin; wherein outputs of the first switching regulator and the second switching regulator are connected to a power bus; a first delay element connected to the synchronization input pin of the first switching regulator; a second delay element connected to the synchronization input pin of the second switching regulator; wherein the first delay element and the second delay element have different delays, the first switching regulator and second switching regulator operating out of phase; and a master clock for providing timing control to the first and second delay elements.

Abstract: A device controller is described within a data storage system for pre-fetching device work information from multiple data storage devices, and accumulating the device work information to immediately respond to a subsequent device poll command from a storage controller. The device controller includes a device receiver to receive the device poll command, a device transmitter to transmit a response to the device poll command, a device information register for storing the pre-fetched device work information for each data storage device, and a sequencer for periodically pre-fetching the device work information from each data storage device. The sequencer pre-fetches such information by verifying that no device subsystem command from the storage controller is pending in the device receiver, then issuing a background poll command to a selected device to query the device for its device work information, and storing the device work information in the device information register.