Abstract: One or more multi-zoned microreactor flow field configurations that facilitate optimized reaction-fluid performance, and one or more methods of designing such multi-zoned microreactor flow fields.

Abstract: A system and method of forming integrated power electronic packages includes 3D-printing a cold plate having a hollow interior recess and a plurality of fins. The method includes printing, using a 3D printer, an electrical insulation layer and a conductor substrate onto a top surface of the cold plate, such that the electrical insulation layer and conductor substrate are embedded within the top surface of the cold plate. The method further includes embedding power devices in the conductor substrate, printing, using a 3D printer, a circuit board on and around the power devices, and mounting electronic components on the circuit board.

Abstract: Disclosed herein are apparatus and methods for a power electronics assembly that includes a printed circuit board (PCB) and an electrical insulation portion. The PCB includes a plurality of embedded power devices and a substrate layer having a plurality of metal inverse opal (MIO) portions. The electrically insulating portion is positioned between each of the MIO portions. The plurality of MIO portions is thermally coupled to the plurality of embedded power devices.

Abstract: A fuel cell system includes: a first fuel cell; a second fuel cell; a cathode configured to receive a positive charge from the first fuel cell and the second fuel cell; an anode disposed apart from the cathode and configured to receive a negative charge from the first fuel cell and the second fuel cell; a manifold enclosing the anode and the cathode; coolant disposed within the manifold and surrounding the cathode and the anode; and a seal disposed between the cathode and the anode so as to prevent the coolant from leaking into the first fuel cell, wherein the cathode includes a seal portion disposed adjacent to the seal and a remaining portion separated from the seal by the seal portion, and wherein the remaining portion of the cathode is configured to be non-parallel with the anode so as to reduce shunt current at the seal portion.

Abstract: Disclosed herein are power electronics assemblies which include a printed circuit board (PCB) having a plurality of conductive layers and a cold plate contacting the PCB. The cold plate includes a manifold constructed from an electrically insulating material and including a first cavity and a second cavity. The cold plate further includes a first heat sink positioned in the first cavity and thermally coupled to the plurality of conductive layers. The cold plate further includes a second heat sink positioned in the second cavity and thermally coupled to the plurality of conductive layers.

Abstract: Disclosed herein are apparatus and methods for a power electronics assembly that includes a printed circuit board (PCB) and an electrical insulation portion. The PCB includes a plurality of embedded power devices and a substrate layer having a plurality of metal inverse opal (MIO) portions. The electrically insulating portion is positioned between each of the MIO portions. The plurality of MIO portions is thermally coupled to the plurality of embedded power devices.

Abstract: Disclosed herein are power electronics assemblies which include a printed circuit board (PCB) having a plurality of conductive layers and a cold plate contacting the PCB. The cold plate includes a manifold constructed from an electrically insulating material and including a first cavity and a second cavity. The cold plate further includes a first heat sink positioned in the first cavity and thermally coupled to the plurality of conductive layers. The cold plate further includes a second heat sink positioned in the second cavity and thermally coupled to the plurality of conductive layers.

Abstract: We provide a novel cleanroom-based process flow that allows for easy creation of multi-level, hierarchical 3D structures in a substrate. This is achieved by introducing an ultra-thin sacrificial hardmask layer on the substrate which is first 3D patterned via multiple rounds of lithography. This 3D pattern is then scaled vertically by a factor of 200 - 300 and transferred to the substrate underneath via a single shot deep etching step. This method is also easily characterizable - using features of different topographies and dimensions, the etch rates and selectivities were quantified; this characterization information was later used while fabricating specific target structures.

Abstract: A system and method of forming integrated power electronic packages includes 3D-printing a cold plate having a hollow interior recess and a plurality of fins. The method includes printing, using a 3D printer, an electrical insulation layer and a conductor substrate onto a top surface of the cold plate, such that the electrical insulation layer and conductor substrate are embedded within the top surface of the cold plate. The method further includes embedding power devices in the conductor substrate, printing, using a 3D printer, a circuit board on and around the power devices, and mounting electronic components on the circuit board.

Abstract: Systems including power device embedded PCBs coupled to cooling devices and methods of forming the same are disclosed. One system includes a power device embedded PCB stack, a cooling assembly including a cold plate having one or more recesses therein, and a buffer cell disposed within each of the one or more recesses. The cooling assembly is bonded to the PCB stack with a insulation substrate disposed therebetween. The cooling assembly is arranged such that the buffer cell faces the PCB stack and absorbs stress generated at an interface of the PCB stack and the cooling assembly.

Abstract: Systems including power device embedded PCBs coupled to cooling devices and methods of forming the same are disclosed. One system includes a power device embedded PCB stack, a cooling assembly including a cold plate having one or more recesses therein, and a buffer cell disposed within each of the one or more recesses. The cooling assembly is bonded to the PCB stack with a insulation substrate disposed therebetween. The cooling assembly is arranged such that the buffer cell faces the PCB stack and absorbs stress generated at an interface of the PCB stack and the cooling assembly.

Abstract: Embodiments of the disclosure relate to apparatuses for enhanced thermal management of an inductor assembly using functionally-graded thermal vias for heat flow control in the windings of the inductor. In one embodiment, a PCB for an inductor assembly includes a top surface and a bottom surface. Two or more electrically-conductive layers are embedded within the PCB and stacked vertically between the top surface and the bottom surface. The two or more electrically-conductive layers are electrically connected to form an inductor winding. A plurality of thermal vias thermally connects each of the two or more electrically-conductive layers to a cold plate thermally connected to the bottom surface. A number of thermal vias thermally connecting each electrically-conductive layer to the cold plate is directly proportional to a predetermined rate of heat dissipation from the electrically-conductive layer.

Abstract: Methods and systems may provide for 3D volumetric displays. Such 3D volumetric displays may include a transparent enclosed volume holding a gas as a stationary gain medium. A scanning mirror may direct a light beam from a light source. A voxel projector may receive the light beam from the scanning mirror and may project an expanded beam into a volume of the stationary gain medium. Changes in the X and Y orientation between the light beam from the scanning mirror and the voxel projector results in relatively larger changes in the X and Y dimension of the expanded beam that is projected into the volume of the stationary gain medium to produce a 3D image.

Abstract: Methods and systems may provide for 3D volumetric displays. Such 3D volumetric displays may include a transparent enclosed volume holding a gas as a stationary gain medium. A scanning mirror may direct a light beam from a light source. A voxel projector may receive the light beam from the scanning mirror and may project an expanded beam into a volume of the stationary gain medium. Changes in the X and Y orientation between the light beam from the scanning mirror and the voxel projector results in relatively larger changes in the X and Y dimension of the expanded beam that is projected into the volume of the stationary gain medium to produce a 3D image.

Abstract: A vapor chamber includes a wick structure created by an additive selective laser sintering process. The wick structure includes a substrate, a first copper powder layer, a second copper powder layer, and a plurality of additional layers. The first copper powder layer is deposited across the substrate, wherein the first copper powder layer is subsequently selectively fused via a fusing instrument. The second copper powder layer is deposited across the first copper powder layer, wherein the second copper powder layer is subsequently selectively fused via the fusing instrument. Additionally, a plurality of additional copper powder layers are deposited wherein each additional layer is deposited on the previous layer, wherein each of the additional copper powder layers is selectively fused with a predetermined structure.

Abstract: Embodiments of the disclosure relate to apparatuses for enhanced thermal management of an inductor assembly using functionally-graded thermal vias for heat flow control in the windings of the inductor. In one embodiment, a PCB for an inductor assembly includes a top surface and a bottom surface. Two or more electrically-conductive layers are embedded within the PCB and stacked vertically between the top surface and the bottom surface. The two or more electrically-conductive layers are electrically connected to form an inductor winding. A plurality of thermal vias thermally connects each of the two or more electrically-conductive layers to a cold plate thermally connected to the bottom surface. A number of thermal vias thermally connecting each electrically-conductive layer to the cold plate is directly proportional to a predetermined rate of heat dissipation from the electrically-conductive layer.

Abstract: An electronics assembly includes a cooling chip structure having a target layer and a jet impingement layer coupled to the target layer. The jet impingement layer has one or more jet channels disposed within the jet impingement layer. Further, one or more through substrate vias are disposed within the jet impingement layer, where the one or more through substrate vias are electrically conductive and are electrically coupled to the target layer. A fluid inlet port and a fluid outlet port are fluidly coupled to the one or more jet channels of the jet impingement layer.

Abstract: A vapor chamber includes a wick structure created by an additive selective laser sintering process. The wick structure includes a substrate, a first copper powder layer, a second copper powder layer, and a plurality of additional layers. The first copper powder layer is deposited across the substrate, wherein the first copper powder layer is subsequently selectively fused via a fusing instrument. The second copper powder layer is deposited across the first copper powder layer, wherein the second copper powder layer is subsequently selectively fused via the fusing instrument. Additionally, a plurality of additional copper powder layers are deposited wherein each additional layer is deposited on the previous layer, wherein each of the additional copper powder layers is selectively fused with a predetermined structure.

Abstract: Electronics assemblies incorporating three-dimensional heat flow structures are disclosed herein. In one embodiment, an electronics assembly includes a substrate having a surface defining a plane, a heat generating component coupled to the surface of the substrate, a cooling device positioned outside of the plane defined by the surface of the substrate, and a three-dimensional heat flow structure. The three-dimensional heat flow structure includes a first portion thermally coupled to the heat generating component and a second portion extending from the first portion. At least a portion of the first portion is parallel to the plane defined by the substrate. The second portion is transverse to the plane defined by the surface of the substrate. The second portion is thermally coupled to the cooling device such that the three-dimensional heat flow structure thermally couples the heat generating component to the cooling device.

Abstract: An electronics assembly includes a cooling chip structure having a device facing surface opposite a base surface and one or more sidewalls extending around a perimeter of the cooling chip structure between the device facing surface and the base surface. A plurality of fluid microchannels fluidly are coupled to a fluid inlet port and a fluid outlet port. A through substrate via extends from the base surface of the cooling chip structure to the device facing surface of the cooling chip structure, where the through substrate via intersects two or more fluid microchannels of the plurality of fluid microchannels.