Abstract: Systems and methods for providing heating and cooling to a cabin of an autonomous or semiautonomous electric vehicle. A system includes one or more autonomous or semiautonomous electric vehicle components generating thermal energy as a byproduct of operation, a radiator fluidly coupled to the one or more vehicle components and positioned downstream from the one or more vehicle components such that the radiator receives at least a portion of the thermal energy, a thermoelectric cooler thermally coupled to and located downstream from the radiator, and one or more bypass valves that control fluid flow from the radiator such that fluid flows directly to a cabin of the vehicle or flows through the thermoelectric cooler before flowing into the cabin.

Abstract: A 2-in-1 power electronics assembly includes a frame with a lower dielectric layer, an upper dielectric layer spaced apart from the lower dielectric layer, and a sidewall disposed between and coupled to the lower dielectric layer and the upper dielectric layer. The lower dielectric layer includes a lower cooling fluid inlet and the upper dielectric layer includes an upper cooling fluid outlet. A first semiconductor device assembly and a second semiconductor device assembly are included and disposed within the frame. The first semiconductor device is disposed between a first lower metal inverse opal (MIO) layer and a first upper MIO layer, and the second semiconductor device is disposed between a second lower MIO layer and a second upper MIO layer. An internal cooling structure that includes the MIO layers provides double sided cooling for the first semiconductor device and the second semiconductor device.

Abstract: A facility can include a main power source. One or more facility systems can be operatively connected to the main power source. The facility can include a plurality of sensors. The plurality of sensors can be configured to acquire facility data. A plurality of energy harvesters can be operatively connected to the plurality of sensors. The plurality of energy harvesters can be configured to convert energy received in one form into another form of energy. The plurality of energy harvesters can be operatively connected to supply energy to the plurality of sensors. The plurality of sensors can be exclusively powered by energy supplied by the plurality of energy harvesters. Thus, the plurality of sensors are decoupled from the main power source. The facility can be a fixed facility or a mobile facility. The facility can be used for disaster relief or other applications.

Abstract: A thermally managed electrical supply unit is provided. The unit contains an energy unit comprising a battery or a battery pack; a casing of a porous thermally conductive framework comprising a phase change material on at least one surface of the energy unit; at least one heat flux rectifier unit on the thermally conductive framework casing; wherein a surface of the heat flux rectifier opposite to the PF/PCM casing is subject to cooling. Also provided is a method for thermal management of an energy unit comprising absorption of heat from the energy unit within a phase change material, transfer of the heat energy from the phase change material through a heat flux rectifier and removal of the heat transferred across the heat flux rectifier. The flow of heat across the heat flux rectifier is irreversible and the heat flux rectifier acts as an on/off switch to control the heat flow.

Abstract: A method for fabricating a multi-layer porous wick structure including, providing a first mold set comprising a negative mold and a positive mold, introducing metal particles in the negative mold defining a first porous wick layer, and sintering the metal particles within the negative mold while interfaced with the positive mold to form the first porous wick layer. The method further includes providing a second mold set comprising a negative mold and a positive mold corresponding to the negative mold and assembling the first porous wick layer with the negative mold of the second mold set. The method further includes introducing filler particles into the negative mold of the second mold set to form a sacrificial layer with the first porous wick layer, introducing metal particles in the negative mold of the second mold set with the first porous wick layer and the sacrificial layer and sintering the metal particles, thereby forming the multi-layer porous wick structure.

Abstract: A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

Abstract: Core-coil devices operate by electromagnetic induction and include inductors, transformers, and electromagnets. Cooled core-coil devices include a magnetic core having a channel through it, and a coil wound around the core. Cooled core-coil devices additionally include a coolant loop that carries ferrofluid coolant through the channel and forms a loop with the channel that extends outside the core. Ferrofluid coolant circulates in the loop without a pump due to a thermo-magnetic response to the device's thermal and magnetic field gradients and thereby cools the core while simultaneously adding to the device's inductance.

Abstract: A 2-in-1 power electronics assembly includes a frame with a lower dielectric layer, an upper dielectric layer spaced apart from the lower dielectric layer, and a sidewall disposed between and coupled to the lower dielectric layer and the upper dielectric layer. The lower dielectric layer includes a lower cooling fluid inlet and the upper dielectric layer includes an upper cooling fluid outlet. A first semiconductor device assembly and a second semiconductor device assembly are included and disposed within the frame. The first semiconductor device is disposed between a first lower metal inverse opal (MIO) layer and a first upper MIO layer, and the second semiconductor device is disposed between a second lower MIO layer and a second upper MIO layer. An internal cooling structure that includes the MIO layers provides double sided cooling for the first semiconductor device and the second semiconductor device.

Abstract: Devices configured to direct heat flow are disclosed, as well as methods of forming thereof. A device may include a self-assembling heat flow object. The self-assembling heat flow object may include a material having one or more self-assembling properties that cause the material to react to an environmental stimulus and one or more thermal pathways. An application of the environmental stimulus causes the self-assembling heat flow object to deploy and arrange the one or more thermal pathways for directing thermal energy to one or more locations.

Abstract: Constraint-based methods for determining orientations of material physical properties using an isoparametric shape function are disclosed. In one embodiment, a method of defining an orientation of an material physical property includes defining nonlinear and/or discontinuous design constraints of design values in a geometric domain associated with one or more physical attributes of the material physical property, and translating the nonlinear and/or discontinuous design constraints into continuous, first order design constraints of the design values by applying an isoparametric shape function. The method further includes performing a topology optimization using the continuous, first order design constraints of the design values, and reverse-translating results of the topology optimization back into the geometric domain using the isoparametric shape function. The results of the topology optimization in the geometric domain are indicative of the orientation of the material physical property.

Abstract: An assembly includes at least one heat emitting device and a continuous conformal cooling structure adhering directly to and conforming with surfaces of at least a portion of the at least one heat emitting device. The cooling structure may include a thermally-conductive, electrically-insulative layer adhering directly to surfaces of the at least one heat generating device to provide an electrically nonconductive, continuous, conformal layer covering all such surfaces. An inner metallization layer may be adhered directly to surfaces of at least a portion of the insulative layer. An outer metallization layer may be adhered directly to surfaces of the inner metallization layer to provide a thermally conductive layer covering such surfaces.

Abstract: A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

Abstract: A hybrid bonding layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity, and a ball grid array (BGA) disposed within the MIO layer. The MIO layer and the BGA may be disposed between a pair of bonding layers. The MIO layer and the BGA each have a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the hybrid bonding layer can be transient liquid phase bonded between a substrate and a semiconductor device. The pair of bonding layers may include a first pair of bonding layers with a melting point above the TLP sintering temperature and a second pair of bonding layers with a melting point below the TLP sintering temperature.

Abstract: A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

Abstract: A cooling bond layer for a power electronics assembly is provided. The cooling bond layer includes a first end, a second end spaced apart from the first end, a metal matrix extending between the first end and the second end, and a plurality of micro-channels extending through the metal matrix from the first end to the second end. The plurality of micro-channels are configured for a cooling fluid to flow through and remove heat from the cooling bond layer. In some embodiments, the plurality of micro-channels are cylindrical shaped micro-channels. In such embodiments, the plurality of micro-channels may have a generally constant average inner diameter along a thickness of the cooling bond layer. In the alternative, the plurality of micro-channels may have a graded average inner diameter along a thickness of the cooling bond layer. In other embodiments, the plurality of micro-channels may have a wire mesh layered structure.

Abstract: A thermal stress compensation layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity disposed between a pair of bonding layers. The thermal stress compensation layer has a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the MIO layer can be transient liquid phase bonded between a metal substrate and a semiconductor device. The pair of bonding layers may comprise a first pair of bonding layers and a second pair of bonding layers with the first pair of bonding layers disposed between the MIO layer and the second pair of bonding layers. The first pair of bonding layers may have a melting point above the TLP sintering temperature and the second pair of bonding layers may have a melting point below the TLP sintering temperature.

Abstract: A wireless in-wheel electric motor assembly having a wheel, an electric motor disposed within the wheel, the electric motor including a stator and a rotor, a receiving coil disposed within the wheel and operable to receive wirelessly transmitted energy, a first converter disposed within the wheel, electrically coupled to the receiving coil and operable to convert the wirelessly transmitted energy from the receiving coil into direct current, an inverter circuit disposed within the wheel, electrically coupled to the conversion circuit and the electric motor, and operable to power the electric motor. The wireless in-wheel electric motor assembly further includes a cooling system disposed within the wheel that includes a micro pump operable to pump coolant, a fluid line operable to pass the coolant proximate at least one of the conversion circuit and the inverter circuit, and a heat exchanger operable to receive heated coolant and dissipate heat to the environment.

Abstract: An assembly includes at least one heat emitting device and a continuous conformal cooling structure adhering directly to and conforming with surfaces of at least a portion of the at least one heat emitting device. The cooling structure may include a thermally-conductive, electrically-insulative layer adhering directly to surfaces of the at least one heat generating device to provide an electrically nonconductive, continuous, conformal layer covering all such surfaces. An inner metallization layer may be adhered directly to surfaces of at least a portion of the insulative layer. An outer metallization layer may be adhered directly to surfaces of the inner metallization layer to provide a thermally conductive layer covering such surfaces.

Abstract: A 2-in-1 power electronics assembly includes a frame with a lower dielectric layer, an upper dielectric layer spaced apart from the lower dielectric layer, and a sidewall disposed between and coupled to the lower dielectric layer and the upper dielectric layer. The lower dielectric layer includes a lower cooling fluid inlet and the upper dielectric layer includes an upper cooling fluid outlet. A first semiconductor device assembly and a second semiconductor device assembly are included and disposed within the frame. The first semiconductor device is disposed between a first lower metal inverse opal (MIO) layer and a first upper MIO layer, and the second semiconductor device is disposed between a second lower MIO layer and a second upper MIO layer. An internal cooling structure that includes the MIO layers provides double sided cooling for the first semiconductor device and the second semiconductor device.

Abstract: A cooling bond layer for a power electronics assembly is provided. The cooling bond layer includes a first end, a second end spaced apart from the first end, a metal matrix extending between the first end and the second end, and a plurality of micro-channels extending through the metal matrix from the first end to the second end. The plurality of micro-channels are configured for a cooling fluid to flow through and remove heat from the cooling bond layer. In some embodiments, the plurality of micro-channels are cylindrical shaped micro-channels. In such embodiments, the plurality of micro-channels may have a generally constant average inner diameter along a thickness of the cooling bond layer. In the alternative, the plurality of micro-channels may have a graded average inner diameter along a thickness of the cooling bond layer. In other embodiments, the plurality of micro-channels may have a wire mesh layered structure.