Abstract: A system and method of plasma processing includes a plasma chamber including a substrate support and an upper electrode opposite the substrate support, the upper electrode having a plurality of concentric temperature control zones and a controller coupled to the plasma chamber.

Abstract: A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.

Abstract: A method for etching features into an etch layer disposed below a patterned mask is provided. At least three cycles are provided, where each cycle comprises providing an ion bombardment, by creating a plasma, of the etch layer to create activated sites of surface radicals in parts of the etch layer exposed by the patterned mask, extinguishing the plasma, exposing the etch layer to a plurality of fluorocarbon containing molecules, which causes the fluorocarbon containing molecules to selectively bind to the activated sites, wherein the selective binding is self limiting, and providing an ion bombardment of the etch layer to initiate an etch reaction between the fluorocarbon containing molecule and the etch layer, wherein the ion bombardment of the etch layer to initiate an etch reaction causes the formation of volatile etch products formed from the etch layer and the fluorocarbon containing molecule.

Abstract: A capacitively-coupled plasma processing system having a plasma processing chamber for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate, the substrate being disposed on the lower electrode during plasma processing. The plasma processing system further includes means for providing at least a first RF signal to the lower electrode, the first RF signal having a first RF frequency. The first RF signal couples with a plasma in the plasma processing chamber, thereby inducing an induced RF signal on the upper electrode. The plasma processing system further includes means for rectifying the induced RF signal to generate a rectified RF signal such that the rectified RF signal is more positively biased than negatively biased, wherein the substrate is configured to be processed while the rectified RF signal is provided to the upper electrode.

Abstract: Apparatus, methods, and computer programs for semiconductor processing in a capacitively-coupled plasma chamber are provided. A chamber includes a bottom radio frequency (RF) signal generator, a top RF signal generator, and an RF phase controller. The bottom RF signal generator is coupled to the bottom electrode in the chamber, and the top RF signal generator is coupled to the top electrode. Further, the bottom RF signal is set at a first phase, and the top RF signal is set at a second phase. The RF phase controller is operable to receive the bottom RF signal and operable to set the value of the second phase. Additionally, the RF phase controller is operable to track the first phase and the second phase to maintain a time difference between the maximum of the top RF signal and the minimum of the bottom RF signal at approximately a predetermined constant value, resulting in an increase of the negative ion flux to the surface of the wafer.

Abstract: A method of manufacturing a military engine includes the steps of designing a commercial engine core, including a combustor, a high pressure compressor driven by a high pressure turbine, and a low pressure turbine designed to drive a low pressure compressor, and a fan through a gear reduction. A high speed fan is attached to the low pressure turbine, such that the combustor, high pressure compressor, low and high pressure turbines from an engine designed for commercial purposes is utilized for military purposes. A gas turbine engine is also disclosed.

Abstract: A method of etching a semiconductor wafer including injecting a source gas mixture into a process chamber including injecting the source gas mixture into a multiple hollow cathode cavities in a top electrode of the process chamber and generating a plasma in each one of the hollow cathode cavities. Generating the plasma in the hollow cathode cavities includes applying a first biasing signal to the hollow cathode cavities. The generated plasma or activated species is output from corresponding outlets of each of the hollow cathode cavities into a wafer processing region in the process chamber. The wafer processing region is located between the outlets of the hollow cathode cavities and a surface to be etched. An etchant gas mixture is injected into the wafer processing region. A plasma can also be supported and/or generated in the wafer processing region.

Abstract: A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.

Abstract: A plasma process chamber includes a top electrode, a bottom electrode disposed opposite the top electrode, the bottom electrode capable of supporting a substrate. The plasma process chamber also includes a plasma containment structure defining a plasma containment region, the plasma containment region being less than an entire surface of the substrate. The plasma containment structure rotates relative to the substrate and wherein the plasma containment region includes a center point of the substrate throughout the rotation of the plasma containment structure relative to the substrate. The plasma containment structure includes multiple gaps. A vacuum source is coupled to the gaps in the plasma containment structure. A method of processing a substrate is also described.

Abstract: One exemplary embodiment of this disclosure relates to a system including an airfoil having a static portion, a moveable portion, and a seal between the static portion and the moveable portion. The seal is moveable separate from the static portion and the moveable portion.

Abstract: A gas turbine engine component includes a pressurized fluid source, an airfoil, and a seal member for selectively providing sealing at an end of the airfoil. The seal member includes a stowed position for non-sealing and a deployed position for sealing. The seal member is operatively connected with a pressurized fluid source for moving the seal member between the stowed position and the deployed position.

Abstract: Apparatus, methods, and computer programs for semiconductor processing in a capacitively-coupled plasma chamber are provided. A chamber includes a bottom radio frequency (RF) signal generator, a top RF signal generator, and an RF phase controller. The bottom RF signal generator is coupled to the bottom electrode in the chamber, and the top RF signal generator is coupled to the top electrode. Further, the bottom RF signal is set at a first phase, and the top RF signal is set at a second phase. The RF phase controller is operable to receive the bottom RF signal and operable to set the value of the second phase. Additionally, the RF phase controller is operable to track the first phase and the second phase to maintain a time difference between the maximum of the top RF signal and the minimum of the bottom RF signal at approximately a predetermined constant value, resulting in an increase of the negative ion flux to the surface of the wafer.

Abstract: A chamber includes a lower electrode and an upper electrode. The lower electrode is defined to transmit a radiofrequency current through the chamber and to support a semiconductor wafer in exposure to a plasma within the chamber. The upper electrode is disposed above and in a spaced apart relationship with the lower electrode. The upper electrode is electrically isolated from the chamber and is defined by a central section and one or more annular sections disposed concentrically outside the central section. Adjacent sections of the upper electrode are electrically separated from each other by a dielectric material. Multiple voltage sources are respectively connected to the upper electrode sections. Each voltage source is defined to control an electric potential of the upper electrode section to which it is connected, relative to the chamber. The electric potential of each upper electrode section influences an electric potential of the plasma within the chamber.

Abstract: A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.

Abstract: Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.

Abstract: A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.

Abstract: Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.

Abstract: The disclosed techniques relate to methods and apparatus for etching a substrate. A plate assembly divides a reaction chamber into a lower and upper sub-chamber. The plate assembly includes an upper and lower plate having apertures therethrough. When the apertures in the upper and lower plates are aligned, ions and neutral species may travel through the plate assembly into the lower sub-chamber. When the apertures are not aligned, ions are prevented from passing through the assembly while neutral species are much less affected. Thus, the ratio of ion flux:neutral flux may be tuned by controlling the amount of area over which the apertures are aligned. In certain embodiments, one plate of the plate assembly is implemented as a series of concentric, independently movable injection control rings. Further, in some embodiments, the upper sub-chamber is implemented as a series of concentric plasma zones separated by walls of insulating material.

Abstract: System and methods for plasma processing of a wafer include a chamber with an electrode having a support surface and an outer edge region defined thereon. A radio frequency power is communicated to the electrode via a conductive delivery connection and returned through a conductive return connection. A capacitance is applied to a first end that causes appropriate capacitive adjustment and opposite impedance adjustment at a second end of the conductive delivery connection that is coupled to a dielectric surround structure that surrounds the electrode. The dielectric surround structure presents the opposite impedance adjustment near an outer edge of the electrode, such that increasing the capacitance at the first end causes a corresponding increase of impedance at the second end and a corresponding increase in voltage distribution near the outer edge region of the electrode that decreases toward a center of the support surface of the electrode.

Abstract: An apparatus used for rapid removal of polymer films from plasma confinement rings while minimizing erosion of other plasma etch chamber components is disclosed. The apparatus includes a center assembly, an electrode plate, a confinement ring stack, a first plasma source, and a second plasma source. The electrode plate is affixed to a surface of the center assembly with a channel defined along the external circumference therein. A first plasma source is disposed within the channel and along the external circumference of the center assembly, wherein the first plasma source is configured to direct a plasma to the inner circumferential surface of the confinement ring stack. A second plasma source located away from the first plasma source is configured to perform processing operations on a substrate within the etch chamber.