Patents by Inventor Eric A. Hudson

Eric A. Hudson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170273287
    Abstract: A device for use during fishing configured to be connected to the user's fishing line to attract fish. The device is shaped to be moved through the water and generally include a head and a tail. A channel extends through at least a portion of the device and is sized to receive the fishing line. The device is constructed from multiple sections. The sections are selectively positionable between a closed configuration with the sections connected together to connect the device to the fishing line, and an open configuration with the sections being separated to remove the device from the fishing line.
    Type: Application
    Filed: April 27, 2017
    Publication date: September 28, 2017
    Inventor: Eric Hudson
  • Patent number: 9735020
    Abstract: A method of etching a wafer includes injecting a source gas mixture into a process chamber. The injecting includes injecting the source gas into multiple hollow cathode cavities in a top electrode, generating plasma in each of the cavities, and outputting the plasma from corresponding outlets of the cavities into a wafer processing region in the chamber, where the processing region is located between the outlets and a surface to be etched. An etchant gas mixture is injected into the processing region through injection ports in the top electrode such that the etchant gas mixes with the plasma output from the outlets. The etchant gas is prevented from flowing into the outlets of the cavities by the plasma flowing from the outlets. Mixing the etchant gas and the output from the cavities generates a desired chemical species in the processing region and thereby enables the surface to be etched.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: August 15, 2017
    Assignee: Lam Research Corporation
    Inventor: Eric A. Hudson
  • Publication number: 20170213747
    Abstract: The disclosed techniques relate to methods and apparatus for etching a substrate. A plate assembly divides a reaction chamber into a lower and upper sub-chamber. The plate assembly includes an upper and lower plate having apertures therethrough. When the apertures in the upper and lower plates are aligned, ions and neutral species may travel through the plate assembly into the lower sub-chamber. When the apertures are not aligned, ions are prevented from passing through the assembly while neutral species are much less affected. Thus, the ratio of ion flux:neutral flux may be tuned by controlling the amount of area over which the apertures are aligned. In certain embodiments, one plate of the plate assembly is implemented as a series of concentric, independently movable injection control rings. Further, in some embodiments, the upper sub-chamber is implemented as a series of concentric plasma zones separated by walls of insulating material.
    Type: Application
    Filed: September 20, 2013
    Publication date: July 27, 2017
    Applicant: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Sang Ki Nam, Alexei Marakhtanov, Eric A. Hudson
  • Publication number: 20170211401
    Abstract: Aspects of the disclosure are directed to a seal configured to interface with at least a first component and a second component of a gas turbine engine. A method for forming the seal includes obtaining an ingot of a fine grained, or a coarse grained, or a columnar grained or a single crystal material from a precipitation hardened nickel base superalloy containing at least 40% by volume of the precipitate of the form Ni3(Al, X), where X is a metallic or refractory element, and processing the ingot to generate a sheet of the material, where the sheet has a thickness within a range of 0.010 inches and 0.050 inches inclusive.
    Type: Application
    Filed: January 22, 2016
    Publication date: July 27, 2017
    Inventors: Alan D. Cetel, Dilip M. Shah, Eric A. Hudson, Raymond Surace
  • Publication number: 20170178920
    Abstract: Methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate are provided. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective film on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective film may be deposited under different conditions (e.g., pressure, duration of reactant delivery, duration of plasma exposure, RF power, and/or RF duty cycle, etc.) in different deposition operations. Such conditions may affect the degree of conformality at which the protective film forms. In various embodiments, one or more protective films may be sub-conformal. In these or other embodiments, one or more other protective films may be conformal.
    Type: Application
    Filed: March 3, 2017
    Publication date: June 22, 2017
    Inventors: Nikhil Dole, Eric A. Hudson, George Matamis
  • Publication number: 20170170026
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating (e.g., a metal-containing coating) on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. Metal-containing coatings have been shown to provide particularly good resistance to lateral etch during the etching operation.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 15, 2017
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyung Joo Shin
  • Publication number: 20170159483
    Abstract: An actuation system according to various embodiments can include an actuation ring having a first end and a second end separated by a gap, the actuation ring being configured to be coupled to a blade outer air seal (BOAS). The actuation system can also include an actuator coupled to at least one of the first end or the second end and configured to adjust a size of the gap such that a tip clearance between the BOAS and a blade tip is reduced in response to the size of the gap being reduced.
    Type: Application
    Filed: November 22, 2016
    Publication date: June 8, 2017
    Applicant: United Technologies Corporation
    Inventors: Eric A. Hudson, Stephen K. Kramer
  • Patent number: 9673058
    Abstract: A method for etching features in a silicon oxide containing etch layer disposed below a patterned mask in a chamber is provided. An etch gas comprising a tungsten containing gas is flowed into the chamber. The etch gas comprising the tungsten containing gas is formed into a plasma. The silicon oxide etch layer is exposed to the plasma formed from the etch gas comprising the tungsten containing gas. Features are etched in the silicon oxide etch layer while exposed to the plasma formed from the etch gas comprising the tungsten containing gas.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: June 6, 2017
    Assignee: Lam Research Corporation
    Inventors: Scott Briggs, Eric Hudson, Leonid Belau, John Holland, Mark Wilcoxson
  • Patent number: 9655353
    Abstract: A device for use during fishing configured to be connected to the user's fishing line to attract fish. The device is shaped to be moved through the water and generally include a head and a tail. A channel extends through at least a portion of the device and is sized to receive the fishing line. The device is constructed from multiple sections. The sections are selectively positionable between a closed configuration with the sections connected together to connect the device to the fishing line, and an open configuration with the sections being separated to remove the device from the fishing line.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: May 23, 2017
    Inventor: Eric Hudson
  • Patent number: 9620377
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating (e.g., a metal-containing coating) on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. Metal-containing coatings have been shown to provide particularly good resistance to lateral etch during the etching operation.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: April 11, 2017
    Assignee: Lab Research Corporation
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyung Joo Shin
  • Publication number: 20170076955
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in substantial preservation of a mask layer on the substrate. The protective coating may be deposited using particular reactants and/or reaction conditions that are unlikely to damage the mask layer. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating.
    Type: Application
    Filed: November 29, 2016
    Publication date: March 16, 2017
    Inventors: Eric A. Hudson, Nikhil Dole
  • Publication number: 20170076945
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.
    Type: Application
    Filed: November 22, 2016
    Publication date: March 16, 2017
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyunjong Shim, Merrett Wong
  • Publication number: 20170044918
    Abstract: Aspects of the disclosure are directed to a seal comprising: a shoe, and at least one beam coupled to the shoe, wherein the seal includes a single crystal material with a predetermined crystalline orientation. Aspects of the disclosure are directed to a method for designing a seal, comprising: obtaining a requirement associated with at least one of: a geometrical profile of the seal, a temperature range over which the seal is to operate, a natural frequency associated with the seal, or a range of deflection associated with the seal, selecting a crystalline orientation for a single crystal material of the seal based on the requirement, and fabricating the seal based on the selected crystalline orientation.
    Type: Application
    Filed: August 13, 2015
    Publication date: February 16, 2017
    Inventors: Michael G. McCaffrey, Eric A. Hudson
  • Patent number: 9548186
    Abstract: A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically coupled to a periphery of the upper electrode, where the UE-PE is configured to be non-coplanar with the upper electrode. The plasma processing system further includes a cover ring. The cover ring is configured to concentrically surround the lower electrode, where the UE-PE and the cover ring forms a second gap.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: January 17, 2017
    Assignee: Lam Research Corporation
    Inventors: Andreas Fischer, Eric Hudson
  • Patent number: 9543158
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in substantial preservation of a mask layer on the substrate. The protective coating may be deposited using particular reactants and/or reaction conditions that are unlikely to damage the mask layer. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: January 10, 2017
    Assignee: Lam Research Corporation
    Inventors: Eric A. Hudson, Nikhil Dole
  • Patent number: 9543148
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: January 10, 2017
    Assignee: Lam Research Corporation
    Inventors: Eric A. Hudson, Mark H. Wilcoxson, Kalman Pelhos, Hyunjong Shim, Merrett Wong
  • Patent number: 9536711
    Abstract: In a plasma processing chamber, a method for processing a substrate is provided. The method includes supporting the substrate in the plasma processing chamber configured with an upper electrode (UE) and a lower electrode (LE), configuring at least one radio frequency power source to ignite plasma between the UE and the LE, and providing a conductive coupling ring, the conductive coupling ring is coupled to the LE to provide a conductive path. The method further includes providing a plasma-facing-substrate-periphery (PFSP) ring, the PFSP ring being disposed above the conductive coupling ring. The method yet further includes coupling the PFSP ring to at least one of a direct current (DC) ground through an RF filter, the DC ground through the RF filter and a variable resistor, a positive DC power source through the RF filter, and a negative DC power source through the RF filter to control plasma processing parameters.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: January 3, 2017
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Eric Hudson, Alexei Marakhtanov, Maryam Moravej, Andreas Fischer
  • Publication number: 20160358784
    Abstract: Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.
    Type: Application
    Filed: August 15, 2016
    Publication date: December 8, 2016
    Inventors: Eric A. Hudson, Andrew D. Bailey, III, Rajinder Dhindsa
  • Publication number: 20160343580
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reactants having low sticking coefficients in some embodiments. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating. In some cases the protective coating is deposited using plasma assisted atomic layer deposition or plasma assisted chemical vapor deposition.
    Type: Application
    Filed: August 1, 2016
    Publication date: November 24, 2016
    Inventor: Eric A. Hudson
  • Publication number: 20160268141
    Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reactants and/or reaction mechanisms that result in substantially complete sidewall coating at relatively low temperatures without the use of plasma. In some cases the protective coating is deposited using molecular layer deposition techniques. In certain implementations the protective coating is fluorinated.
    Type: Application
    Filed: May 24, 2016
    Publication date: September 15, 2016
    Inventor: Eric A. Hudson