Patents by Inventor Eric Bernier

Eric Bernier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050094998
    Abstract: A method and a protection switching arrangement for protection switching of any one of a plurality of optical signals of a multi-wavelength optical signal from the failure of an optical component is provided. The multi-wavelength optical signal which contains the optical signals is itself rerouted by the use of wavelength agnostic rerouting elements, after which a tunable optical filter is used to obtain from the multi-wavelength optical signal the particular optical signal which would have been affected by the failure. In embodiments of the invention where the failed component is a switching fabric, the multi-wavelength optical signal is rerouted away from the failed switching fabric through a redundant switching fabric after which the particular optical signal is obtained with use of the tunable optical filter.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Inventors: Eric Bernier, Dominic Goodwill, Mirjana Vukovic
  • Patent number: 6791808
    Abstract: A clipping device intended for absorbing current peaks from 1 to 10 amperes, formed of a vertical NPN transistor, having an unconnected base, an emitter connected to a terminal on which positive voltage peaks are likely to appear, and a grounded collector, the transistor parameters being set so that it exhibits a negative dynamic resistance.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: September 14, 2004
    Assignee: STMicroelectronics S.A.
    Inventors: Eric Bernier, Robert Pezzani
  • Publication number: 20040160905
    Abstract: A network device such as a combination ONU-DSLAM deployed outside the central office includes a wireless transceiver to enable a technician to interface with the network device over a wireless control channel. This allows the technician to monitor, interrogate, and control the network device to ascertain performance of the network or the network device and cause the network device to perform particular desired operations. Additionally, providing a wireless interface enables the network technician to fix specific perceived problems in the network device, such as by uploading new software to the network device, to enable the network device to have increased functionality or more reliable performance. Infra-red, wireless, powerline, or another technology may be used to interface with the network device. The wireless access port may also enable subscribers to access the network, for example by causing the network device to act as an 802.11 hot spot.
    Type: Application
    Filed: July 10, 2003
    Publication date: August 19, 2004
    Applicant: Nortel Networks Limited
    Inventors: Eric Bernier, John Watkins, Glenn Algie
  • Publication number: 20040156635
    Abstract: An optical network unit (ONU) interconnected by passive optical network (PON) equipment to an optical line terminal (OLT) is identified using secondary modulation of the optical carrier to impress an identifier of the ONU onto the carrier. This resolves a recurring ONU failure mode detection problem caused by failure of a laser driver that causes the ONU to be stuck in an on state.
    Type: Application
    Filed: June 23, 2003
    Publication date: August 12, 2004
    Applicant: Nortel Networks Limited
    Inventors: Kent Evans Felske, Richard Brand, Eric Bernier
  • Publication number: 20040027005
    Abstract: The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made of ferromagnetic material. At each current alternation of the network, the interrogation of the magnetic state of the strand results in the presence, or not, of a control signal on the power device (Sw).
    Type: Application
    Filed: April 29, 2003
    Publication date: February 12, 2004
    Inventors: Jean Jalade, Jean-Pierre Laur, Jean-Louis Sanchez, Patrick Austin, Marie Breil, Eric Bernier
  • Patent number: 6674148
    Abstract: A method for adjusting the gain or the sensitivity of a lateral component formed in the front surface of a semiconductor wafer, having a first conductivity type, includes not doping or overdoping, according to the first conductivity type, the back surface when it is desired to reduce the gain or sensitivity of the lateral component, and doping according to the second conductivity type, the back surface, when the gain or the sensitivity of the lateral component is to be increased.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: January 6, 2004
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Eric Bernier, Jean-Michel Simonnet
  • Patent number: 6326648
    Abstract: A monolithic power switch with a controlled di/dt including the parallel assembly of a MOS or IGBT type component with a thyristor type component, including means for inhibiting the thyristor type component during the closing phase of the switch, which is ensured by the IGBT type component. The IGBT type component has a vertical multicell structure and the component of thyristor type has a vertical monocell structure.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: December 4, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Jean Jalade, Jean-Louis Sanchez, Jean-Pierre Laur, Marie Breil, Patrick Austin, Eric Bernier, Mathieu Roy
  • Patent number: 6323718
    Abstract: The present invention relates to a normally-on bidirectional switch, including, in parallel between two power terminals of the switch, a first cathode-gate thyristor, the anode of which is connected to a first power terminal, a second anode-gate thyristor, the anode of which is connected to a second power terminal, and a resistor in series with a controllable switch, the midpoint of this series association being connected to the respective gates of the two thyristors. The present invention also provides a monolithic integration of the switch.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: November 27, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre Rault, Eric Bernier
  • Patent number: 6262443
    Abstract: The present invention relates to a semiconducting structure constituting a protected rectifying bridge implemented in an N-type semiconductor substrate divided into first, second, and third wells by vertical P-type isolating walls, in which the rear surface of the substrate is coated with a first metallization and in which each of the first and second wells includes a vertical diode and a vertical Shockley diode. The third well includes a P-type isolating layer on its rear surface side in contact with the first metallization and, on its front surface side, two lateral diodes, each of which is formed between a P-type region and the substrate.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: July 17, 2001
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Christian Ballon, Eric Bernier
  • Publication number: 20010005302
    Abstract: A clipping device intended for absorbing current peaks from 1 to 10 amperes, formed of a vertical NPN transistor, having an unconnected base, an emitter connected to a terminal on which positive voltage peaks are likely to appear, and a grounded collector, the transistor parameters being set so that it exhibits a negative dynamic resistance.
    Type: Application
    Filed: December 22, 2000
    Publication date: June 28, 2001
    Inventors: Eric Bernier, Robert Pezzani
  • Patent number: 6049096
    Abstract: The present invention relates to a component protecting against electric overloads likely to occur on a conductor in series with which is placed a detection resistor. The component includes a first cathode-gate thyristor and a second anode-gate thyristor, of the gate current or forward break-over type. The anode region of the first thyristor, formed on the lower surface side, is separate from the isolating wall surrounding the thyristor and the rear surface of the isolating wall is coated with a portion of an insulating layer.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: April 11, 2000
    Assignee: STMicroelectronics, S.A.
    Inventor: Eric Bernier
  • Patent number: 5998812
    Abstract: An amplifying-gate thyristor having an increased integrated circuit includes a main thyristor and an amplifying thyristor. The amplifying thyristor is of the gate turnoff-type. The main thyristor and the amplifying thyristor are such that the amplifying thyristor remains in the conductive state while the main thyristor is conductive. A control circuit turns off the amplifying thyristor when the current through the main thyristor is approximately its hold current.
    Type: Grant
    Filed: January 19, 1998
    Date of Patent: December 7, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Eric Bernier, Denis Berthiot
  • Patent number: 5998813
    Abstract: A monolithic component for protection against over-currents liable to occur on a line in series with which is connected a detection resistor, comprises a first cathode-gate thyristor associated with an avalanche diode and a second anode-gate thyristor of the gate triggering type or forward breakover type, its breakover voltage being substantially equal to the avalanche voltage of the avalanche diode.
    Type: Grant
    Filed: January 8, 1997
    Date of Patent: December 7, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Eric Bernier
  • Patent number: 5994171
    Abstract: A method for adjusting the gain or the sensitivity of a lateral component formed in the front surface of a semiconductor wafer, having a first conductivity type, includes not doping or overdoping, according to the first conductivity type, the back surface when it is desired to reduce the gain or sensitivity of the lateral component, and doping according to the second conductivity type, the back surface, when the gain or the sensitivity of the lateral component is to be increased.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: November 30, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Eric Bernier, Jean-Michel Simonnet
  • Patent number: 5982016
    Abstract: A monolithic component including, in an N-type lightly-doped substrate of a semiconductor wafer, two portions separated by a P-type insulating wall. A first portion of the two portions includes a high voltage lateral component, a layer of which substantially corresponds to the thickness of the wafer. The second portion includes logic circuit components. A rear surface of the substrate includes a P-type layer coated with a metallization. The insulating wall is in electrical contact with a low voltage terminal of the high voltage lateral component, such as the gate region of a thyristor. The logic portion includes at least one vertical component.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: November 9, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Robert Pezzani, Eric Bernier
  • Patent number: 5861639
    Abstract: A dipole component with a controlled breakover sensitivity includes a main thyristor having its gate connected to its anode through a pilot thyristor, and a triggering transistor disposed in parallel with the pilot thyristor, the base of the triggering transistor being connected to the gate of the pilot thyristor.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: January 19, 1999
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Eric Bernier
  • Patent number: 5828089
    Abstract: A monolithic component for protecting a subscriber line interface circuit includes, in an N-type substrate, whose bottom surface is coated with a first uniform metallization, first and second portions separated by a P-type isolation wall. The first portion includes two vertical diodes having a common cathode corresponding to the bottom surface of the substrate, two vertical transistors having a common collector and a common base, the collectors corresponding to the bottom surface of the substrate. The second portion includes two sets each including a pair of head-to-tail parallel-connected vertical thyristors and a pair of head-to-tail parallel-connected vertical zener diodes for controlling the conduction of these thyristors.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: October 27, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Eric Bernier
  • Patent number: 5808326
    Abstract: A protection semiconductor component includes at least two pairs of main Shockley diodes, each pair including two parallel diodes, head-to-tail connected between a front surface metallization and a rear surface metallization, the rear surface metallization being common to the two pairs of diodes. Each of the main diodes whose blocking junction corresponds to a distinct well on the side of the front surface is associated with at least one auxiliary Shockley diode having the same polarity and a lower triggering threshold, the triggering of one auxiliary diode thus causing the triggering of the other auxiliary diode and of the associated main Shockley diodes.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: September 15, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Eric Bernier, Christian Ballon
  • Patent number: 5739555
    Abstract: An amplifying-gate thyristor having an increased integrated circuit includes a main thyristor and an amplifying thyristor. The amplifying thyristor is of the gate turnoff-type. The main tbyristor and the amplifying thyristor are such that the amplifying thyristor remains in the conductive state while the main thyristor is conductive. A control circuit turns off the amplifying thyristor when the current through the main thyristor is approximately its hold current.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: April 14, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Eric Bernier, Denis Berthiot
  • Patent number: RE35854
    Abstract: A programmable protection circuit comprises three identical units connected between a common point (C) and a first conductor (A), a second conductor (B) and ground (M). Each unit comprises the anti-parallel arrangement of a thyristor (T) and a diode (D), a bipolar transistor (TR) being connected between the gate and anode of the thyristor, the anodes of the thyristors being connected to the common point and the base terminal of each unit constituting a programmation terminal and being connected to a device defining a voltage threshold. Each device defining a voltage threshold is a zener diode (Z1, Z2, Z3) connected between each base terminal and the common point.
    Type: Grant
    Filed: March 22, 1995
    Date of Patent: July 21, 1998
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventors: Robert Pezzani, Eric Bernier