Patents by Inventor Eric Huang

Eric Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9626654
    Abstract: Learning to rank modeling in the context of an on-line social network is described. A learning to rank model can learn from pairwise preference (e.g., job posting A is more relevant than job posting B for a particular member profile) thus directly optimizing for the rank order of job postings for each member profile. With ranking position taken into consideration during training, top-ranked job postings may be treated by a recommendation system as being of more importance than lower-ranked job postings. In addition, a learning to rank approach may also result in an equal optimization across all member profiles and help minimize bias towards those member profiles that have been paired with a larger number of job postings.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: April 18, 2017
    Assignee: LinkedIn Corporation
    Inventors: Lijun Tang, Eric Huang, Xu Miao, Yitong Zhou, David Hardtke, Joel Daniel Young
  • Publication number: 20170017938
    Abstract: An electronic device capable of communicating with a card reading apparatus and a payment method are provided. The electronic device includes a first cover configuring a front side of the electronic device, a second cover configuring a back side of the electronic device, a memory contained in a hollow area formed between the first and second covers, a display, at least part of which is contained in the hollow area and which is disclosed through the first cover, a processor that is contained in the hollow area and is electrically connected to the memory, and at least one loop antenna which is contained in the hollow area and electrically connected to the processor.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 19, 2017
    Inventors: Woosup LEE, Eric HUANG, George WALLNER, Kyeongjo KEUM, Younju KIM, Hyunju HONG, Jungsik PARK
  • Publication number: 20170004455
    Abstract: Nonlinear featurization of decision trees for linear regression modeling in the context of an on-line social network is described. A computer-implemented converter is provided that is capable of reading a decision tree structure that is included in the learning to rank algorithm and convert each path from root to a leaf into an s-expression. The s-expressions are used as additional features to train a logistic regression model.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Lijun Tang, Eric Huang, Xu Miao, Yitong Zhou, David Hardtke, Jeol Daniel Young
  • Publication number: 20170004454
    Abstract: Learning to rank modeling in the context of an on-line social network is described. A learning to rank model can learn from pairwise preference (e.g., job posting A is more relevant than job posting B for a particular member profile) thus directly optimizing for the rank order of job postings for each member profile. With ranking position taken into consideration during training, top-ranked job postings may be treated by a recommendation system as being of more importance than lower-ranked job postings. In addition, a learning to rank approach may also result in an equal optimization across all member profiles and help minimize bias towards those member profiles that have been paired with a larger number of job postings.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Lijun Tang, Eric Huang, Xu Miao, Yitong Zhou, David Hardtke, Joel Daniel Young
  • Patent number: 9529833
    Abstract: One embodiment of the present invention provides a system for graph pruning. During operation, the system identifies a connected component in a graph comprising one or more vertices. A respective vertex of the graph represent an element in a data set, an edge between two vertices represents a type and strength of relationship between the vertices. The system identifies a connected component to be smaller than a minimum graph traversal threshold associated with a query for the graph. This minimum graph traversal threshold indicates a minimum number of traversal steps needed for the query. The system then generates a second graph by pruning the connected component from the graph. This second graph is processed to extract information of interest from the data set.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: December 27, 2016
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Eric Huang, Rong Zhou
  • Publication number: 20160372462
    Abstract: An exemplary integrated circuit comprises: a first device gate disposed over the first device region, the first device gate comprising a first interfacial layer and a first dielectric layer; a second device gate disposed over the second device region, the second device gate comprising a second interfacial layer and a second dielectric layer; and a third device gate disposed over the third device region, the third device gate comprising a third interfacial layer and a third dielectric layer, wherein the first interfacial layer, the second interfacial layer, and the third interfacial layer are different from each other in at least one of a thickness and an interfacial material.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 22, 2016
    Inventors: Po-Nien CHEN, Bao-Ru YOUNG, Chi-Hsun HSIEH, Harry Hak-Lay CHUANG, Wei Cheng WU, Eric HUANG
  • Patent number: 9378961
    Abstract: A method including providing a substrate having a first region, a second region, and a third region defined thereupon. A first interfacial layer is formed over the first region, the second region, and the third region. The first interfacial layer is etched to remove a portion of the first interfacial layer from the first region and a portion of the first interfacial layer from the second region. Etching of the first interfacial layer defines a gate stack within the third region. After the etching of the first interfacial layer, a second interfacial layer is formed over at least a portion of the second region. The second interfacial layer is etched to define a gate stack within the second region. After the etching of the second interfacial layer, a third interfacial layer is formed on the substrate over at least a portion of the first region to define a gate stack within the first region.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Nien Chen, Bao-Ru Young, Chi-Hsun Hsieh, Harry Hak-Lay Chuang, Wei Cheng Wu, Eric Huang
  • Publication number: 20160070759
    Abstract: Real-time responsiveness to queries regarding data in a relational database can be improved by performing in parallel continuous construction of a graph model of the data and answering the queries based on the graph model. Two processing threads are ran in parallel. The main thread receives user queries regarding data in a database and answers the queries based on a graph data structure stored as a graph model of the data. The main thread also starts a graph update thread, which continuously updates the graph model by requesting a server managing the database to build a description of a graph representative of the data, receiving the description, and storing the description in an initialized graph data structure. The graph data structure previously stored as the graph model is swapped for a more recently completed data structure that represents the data at a later point of time.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 10, 2016
    Inventor: Eric Huang
  • Patent number: 9224732
    Abstract: A method of forming a device includes forming a buried well region of a first dopant type in a substrate. A well region of the first dopant type is formed over the buried well region. A first well region of a second dopant type is formed between the well region of the first dopant type and the buried well region of the first dopant type. A second well region of the second dopant type is formed in the well region of the first dopant type. An isolation structure is formed at least partially in the well region of the first dopant type. A first gate electrode is formed over the isolation structure and the second well region of the second dopant type.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 29, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao, Chia-Chin Shen, Eric Huang, Fu Chin Yang, Chun Lin Tsai, Hsiao-Chin Tuan
  • Publication number: 20150262825
    Abstract: A method including providing a substrate having a first region, a second region, and a third region defined thereupon. A first interfacial layer is formed over the first region, the second region, and the third region. The first interfacial layer is etched to remove a portion of the first interfacial layer from the first region and a portion of the first interfacial layer from the second region. Etching of the first interfacial layer defines a gate stack within the third region. After the etching of the first interfacial layer, a second interfacial layer is formed over at least a portion of the second region. The second interfacial layer is etched to define a gate stack within the second region. After the etching of the second interfacial layer, a third interfacial layer is formed on the substrate over at least a portion of the first region to define a gate stack within the first region.
    Type: Application
    Filed: May 29, 2015
    Publication date: September 17, 2015
    Inventors: Po-Nien Chen, Bao-Ru Young, Chi-Hsun Hsieh, Harry Hak-Lay Chuang, Wei Cheng Wu, Yu-Fang (Eric) Huang
  • Publication number: 20150234875
    Abstract: One embodiment of the present invention provides a system for graph pruning. During operation, the system identifies a connected component in a graph comprising one or more vertices. A respective vertex of the graph represent an element in a data set, an edge between two vertices represents a type and strength of relationship between the vertices. The system identifies a connected component to be smaller than a minimum graph traversal threshold associated with a query for the graph. This minimum graph traversal threshold indicates a minimum number of traversal steps needed for the query. The system then generates a second graph by pruning the connected component from the graph. This second graph is processed to extract information of interest from the data set.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Eric Huang, Rong Zhou
  • Publication number: 20150193854
    Abstract: One embodiment of the present invention provides a system for generating a product recommendation by translating transaction data to graph representation for input to a graph analytics application. During operation, the system generates a transaction table to store transaction data, a customer table to store customer data, and a product table to store products data. The system generates a table containing topology and edge identifier information and a table containing edge attribute information. Next, the system generates headers that include data describing the customer table and/or the product table and/or the table containing edge attribute information. The system then generates files containing the one or more headers and data from the tables, in which the data describes a graph with edges representing transactions and vertices representing customers or products. Subsequently, the system submits the one or more files as input to the graph analytics application to generate a product recommendation.
    Type: Application
    Filed: January 6, 2014
    Publication date: July 9, 2015
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Eric Huang, Rong Zhou, Daniel Davies
  • Patent number: 9048335
    Abstract: An integrated circuit having multiple different device gate configurations and a method for fabricating the circuit are disclosed. An exemplary embodiment of forming the circuit includes receiving a substrate having a first device region, a second device region, and a third device region. A first interfacial layer is formed over at least a portion of each of the first device region, the second device region, and the third device region. The first interfacial layer is patterned to define a gate stack within the third device region. A second interfacial layer is formed over at least a portion of the second device region. The second interfacial layer is patterned to define a gate stack within the second device region. A third interfacial layer is formed over at least a portion of the first device region. The third interfacial layer defines a gate stack within the first device region.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: June 2, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Nien Chen, Eric Huang, Chi-Hsun Hsieh, Wei Cheng Wu, Bao-Ru Young, Harry Hak-Lay Chuang
  • Publication number: 20140354734
    Abstract: A microfluidic electronic device is disclosed. This microfluidic electronic device may include a separate actuator mechanism from a microfluidic cartridge. The microfluidic cartridge may include a fluid reservoir coupled to a nozzle by a channel, where the fluid reservoir holds a fluid with a solvent and a material in solution, and the microfluidic cartridge may be remateably coupled to the microfluidic electronic device. During operation of the microfluidic electronic device, the microfluidic cartridge supplies fluid to the nozzle via the channel, and the actuator mechanism drives droplets from the nozzle without contact between the actuator mechanism and the fluid. Furthermore, the droplets may be driven from the nozzle onto a substrate without contact between the substrate and the nozzle, and a positioning mechanism in the microfluidic electronic device may accurately position the nozzle relative to the substrate.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 4, 2014
    Applicant: The Regents of the University of California
    Inventors: Tingrui Pan, Yuzhe Ding, Eric Huang, Kit Lam
  • Patent number: 8902201
    Abstract: An assembling infrared touch control module includes four L-shaped first frame members and a plurality of straight second frame members matched in pairs. Each first and second frame member has a space therein and two openings at two ends thereof, respectively, in communication with the space. Each space has a circuit board therein. Each circuit board has a plurality of infrared transmitter/receiver components thereon and two connectors thereon at the two openings, respectively. The four first frame members and the second frame members, whose number may be increased or decreased by demand, are assembled together to form a frame by the connectors, so that an active touch area of the frame may be resized by demand to be adapted to a display device of any size, and an additional touch control function adapted to an extended area for the display device may be set.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 2, 2014
    Assignee: Top Victory Investments Ltd.
    Inventors: Iman Hung, Chien-Ta Lin, Eric Huang, Sean Chen
  • Publication number: 20140264036
    Abstract: An assembling infrared touch control module is provided and includes four L-shaped first frame members and a plurality of straight second frame members matched in pairs. Each first and second frame member has a space therein and two openings at two ends thereof, respectively, in communication with the space. Each space has a circuit board therein. Each circuit board has a plurality of infrared transmitter/receiver components thereon and two connectors thereon at the two openings, respectively. The four first frame members and the second frame members whose number may be increased or decreased by demand are assembled together to form a frame by means of the connectors so that an active touch area of the frame may be resized by demand to be adapted to a display device of any size, and an additional touch control function adapted to an extended area for the display device may be set.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 18, 2014
    Inventors: Iman Hung, Chien-Ta Lin, Eric Huang, Sean Chen
  • Publication number: 20140246732
    Abstract: An integrated circuit having multiple different device gate configurations and a method for fabricating the circuit are disclosed. An exemplary embodiment of forming the circuit includes receiving a substrate having a first device region, a second device region, and a third device region. A first interfacial layer is formed over at least a portion of each of the first device region, the second device region, and the third device region. The first interfacial layer is patterned to define a gate stack within the third device region. A second interfacial layer is formed over at least a portion of the second device region. The second interfacial layer is patterned to define a gate stack within the second device region. A third interfacial layer is formed over at least a portion of the first device region. The third interfacial layer defines a gate stack within the first device region.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Nien Chen, Eric Huang, Chi-Hsun Hsieh, Wei Cheng Wu, Bao-Ru Young, Harry Hak-Lay Chuang
  • Patent number: D711534
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: August 19, 2014
    Inventor: Eric Huang
  • Patent number: D714439
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: September 30, 2014
    Inventor: Eric Huang
  • Patent number: D743548
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: November 17, 2015
    Inventor: Eric Huang