Patents by Inventor Eric J. Li

Eric J. Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110059596
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Application
    Filed: November 2, 2010
    Publication date: March 10, 2011
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 7897486
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 1, 2011
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 7767563
    Abstract: A semiconducting structure includes a thinned silicon substrate (110), a silicide layer (120) over the thinned silicon substrate, a metal layer (130) over the silicide layer, a solder interface layer (140) over the metal layer, and a cap layer (150) over the solder interface layer. The thinned silicon substrate is no thicker than approximately 500 micrometers. The silicide layer is formed using a rapid thermal processing procedure that locally heats the interface between the metal layer and the silicon substrate but causes no more than negligible thermal impact to other areas of the silicon wafer.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: August 3, 2010
    Assignee: Intel Corporation
    Inventor: Eric J. Li
  • Patent number: 7611966
    Abstract: A method is described for laser scribing or dicing portions of a workpiece using multi-source laser systems. In one embodiment, a first laser melts portions of the workpiece prior to a second laser ablating the portions of the workpiece.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: November 3, 2009
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Sergei L. Voronov, Christopher L. Rumer
  • Patent number: 7553386
    Abstract: An adhesive adapted with particular optical properties, and its use to couple a substrate to a substrate holder during substrate processing are disclosed. After processing the substrate, the optical properties of the adhesive may be exploited to locate and/or remove adhesive residue that may be present on the substrate.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: June 30, 2009
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Eric J. Li
  • Publication number: 20090124067
    Abstract: A method and apparatus for a backside metallization of a wafer is provided. The wafer comprised of a first substance is bent by creating tension on a backside and creating compression on a front side prior to deposition of a thin film of a second substance. After deposition, the wafer is released and the thin film deposited on the wafer exhibits less tensile stress than if the thin film was deposited on a flat wafer.
    Type: Application
    Filed: November 14, 2007
    Publication date: May 14, 2009
    Inventors: Andrew N. Contes, Eric J. Li, Arturo Urquiza
  • Patent number: 7504318
    Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a conformal layer of a water soluble nanopowder on a wafer, and then scribing the wafer.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: March 17, 2009
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Eric J. Li, Tian-An Chen
  • Publication number: 20080242054
    Abstract: Methods and apparatus to dicing and/or drilling of wafers are described. In one embodiment, an electromagnetic radiation beam (e.g., a relatively high intensity, ultra-short laser beam) may be used to dice and/or drill a wafer. Other embodiments are also described.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventors: Andy Antonelli, Eric J. Li, Sergei Voronov
  • Publication number: 20080230911
    Abstract: A semiconducting structure includes a thinned silicon substrate (110), a silicide layer (120) over the thinned silicon substrate, a metal layer (130) over the silicide layer, a solder interface layer (140) over the metal layer, and a cap layer (150) over the solder interface layer. The thinned silicon substrate is no thicker than approximately 500 micrometers. The silicide layer is formed using a rapid thermal processing procedure that locally heats the interface between the metal layer and the silicon substrate but causes no more than negligible thermal impact to other areas of the silicon wafer.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 25, 2008
    Inventor: Eric J. Li
  • Publication number: 20080216950
    Abstract: An adhesive adapted with particular optical properties, and its use to couple a substrate to a substrate holder during substrate processing are disclosed. After processing the substrate, the optical properties of the adhesive may be exploited to locate and/or remove adhesive residue that may be present on the substrate.
    Type: Application
    Filed: May 22, 2008
    Publication date: September 11, 2008
    Inventors: Daoqiang Lu, Eric J. Li
  • Patent number: 7393468
    Abstract: An adhesive adapted with particular optical properties, and its use to couple a substrate to a substrate holder during substrate processing are disclosed. After processing the substrate, the optical properties of the adhesive may be exploited to locate and/or remove adhesive residue that may be present on the substrate.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: July 1, 2008
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Eric J. Li
  • Patent number: 7279362
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: October 9, 2007
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 7169687
    Abstract: A method is described for laser scribing or dicing portions of a workpiece using multi-source laser systems. In one embodiment, a first laser uses multiphoton absorption to lower the ablation threshold of portions of the workpiece prior to a second laser ablating the portions of the workpiece. In an alternative embodiment, a first laser uses high energy single-photon absorption to lower the ablation threshold of portions of the workpiece prior to a second laser ablating the portions of the workpiece.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: January 30, 2007
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Sergei L. Voronov, Christopher L. Rumer
  • Patent number: 7118989
    Abstract: Disclosed are various embodiments of a method of forming vias for backside connections in a wafer stack, wherein the vias are formed by non-thermal laser ablation. Other embodiments are described an claimed.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: October 10, 2006
    Assignee: Intel Corporation
    Inventors: Shriram Ramanathan, Eric J. Li