Patents by Inventor Eric Kimball

Eric Kimball has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11969343
    Abstract: Methods for rotationally aligning transcatheter heart valve prosthesis within a native heart valve include percutaneously delivering the transcatheter heart valve prosthesis to the native heart valve, wherein the transcatheter heart valve prosthesis includes at least one imaging marker, receiving a cusp overlap viewing angle image and/or a coronary overlap viewing angle image of the transcatheter heart valve prosthesis within the native heart valve, determining, based on the cusp overlap viewing angle image and/or the coronary overlap viewing angle image and the at least one imaging marker, whether the transcatheter heart valve prosthesis is in a desired rotational orientation, if the at least one imaging marker in the cusp overlap viewing angle image and/or the coronary overlap viewing angle indicates that the transcatheter heart valve prosthesis is not in the desired rotational orientation, rotating the transcatheter heart valve prosthesis until the transcatheter heart valve prosthesis is in the desired rot
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 30, 2024
    Assignee: Medtronic, Inc.
    Inventors: Frank Harewood, Taylor Winters, Evelyn Birmingham, Sara Saul, Victor Kimball, Eric Pierce, Radhika Bhargav, Jeffrey Sandstrom, Caitlin Dorff
  • Publication number: 20230308060
    Abstract: Amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include multiple driver circuits and a control circuit. The control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits, according to an input signal to be reproduced by one or more of the multiple amplifier driver circuits. The control circuit determines a splice point at which the control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits.
    Type: Application
    Filed: May 31, 2023
    Publication date: September 28, 2023
    Inventors: John L. Melanson, Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11750157
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: September 5, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Eric Kimball
  • Patent number: 11722107
    Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: August 8, 2023
    Assignee: CIRRUS LOGIC, INC.
    Inventors: John L. Melanson, Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11644493
    Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: May 9, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Saurabh Singh, Chandra B. Prakash, Eric Kimball, Cory J. Peterson, Ryan Lobo
  • Publication number: 20230003779
    Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
    Type: Application
    Filed: February 10, 2022
    Publication date: January 5, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Saurabh SINGH, Chandra B. PRAKASH, Eric KIMBALL, Cory J. PETERSON, Ryan LOBO
  • Publication number: 20230006612
    Abstract: An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage.
    Type: Application
    Filed: September 8, 2022
    Publication date: January 5, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Chandra PRAKASH, Cory J. PETERSON, Eric KIMBALL
  • Patent number: 11500406
    Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: November 15, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Ramin Zanbaghi, Eric Kimball
  • Patent number: 11489498
    Abstract: An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: November 1, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Chandra Prakash, Cory J. Peterson, Eric Kimball
  • Patent number: 11474216
    Abstract: A method may include operating a single-photon avalanche diode (SPAD) in a first mode to determine a light intensity level associated with the SPAD, operating the SPAD in a second mode wherein a reverse bias voltage is applied in the second mode to bias the SPAD beyond its breakdown voltage, such that the SPAD operates in a detection mode, and determining a magnitude of the bias voltage applied to the SPAD in the second mode based on the light intensity level determined in the first mode.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: October 18, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Eric Kimball, Kyriaki Fotopoulou
  • Publication number: 20220308613
    Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.
    Type: Application
    Filed: March 25, 2021
    Publication date: September 29, 2022
    Inventors: Ramin Zanbaghi, Eric Kimball
  • Publication number: 20220247367
    Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 4, 2022
    Inventors: John L. Melanson, Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11398804
    Abstract: A method for operating a charge pump having a variable switching frequency may include comparing a target minimum output voltage with an output voltage generated at an output of the charge pump and controlling switching of switches of the charge pump based on the comparison such that the variable switching frequency varies as an output current driven by the charge pump varies.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: July 26, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Jason W. Lawrence, Eric J. King, Christian Larsen, Hasnain Akram, Eric Kimball
  • Publication number: 20220190794
    Abstract: A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.
    Type: Application
    Filed: May 26, 2021
    Publication date: June 16, 2022
    Inventors: Edmund M. Schneider, Ramin Zanbaghi, Terence C. Bowness, Eric Kimball
  • Publication number: 20220158597
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 19, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramin ZANBAGHI, Cory J. PETERSON, Eric KIMBALL
  • Patent number: 11329617
    Abstract: Class-D amplifiers and modulators therefor provide control of the DC operating point of the outputs of the amplifiers. The modulators generate a sum and difference signal using combiners and introduce the sum signal to a reference input of the quantizer, while the quantization input of the quantizer receives the difference signal. A difference mode loop filter circuit may filter the difference signal and a common mode loop filter may filter the sum signal. Outputs of the quantizer operate a pair of switching circuits to provide either a differential output with the sum signal set to a constant voltage and the difference signal provided by the signal to be reproduced, or a pair of single-ended outputs with the individual input signals used to generate the sum and difference signal, and selection of a differential or dual single-ended operating mode may be performed by a control circuit that reconfigures the combiners.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: May 10, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11309853
    Abstract: A class-D amplifier includes a first differential modulator circuit, a first driver circuit including a first high-side switch and a first low-side switch. An input of the first driver circuit may be coupled to a first output of the first differential modulator circuit so that the first differential modulator circuit controls the first driver circuit. The class-D amplifier may also include a second driver circuit including a second high-side switch and a second low-side switch coupling the second and control logic that selects between a single-ended operating state and a differential operating state of the class-D amplifier circuit. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that the first differential modulator circuit controls the second driver circuit when the differential operating state is selected.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 19, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11296663
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: April 5, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
  • Patent number: 11290071
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: March 29, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
  • Patent number: 11290070
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: March 29, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Eric Kimball