Patents by Inventor Eric Pape
Eric Pape has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12060636Abstract: A method for conditioning a plasma processing chamber including a chuck is provided. The method comprises a plurality of cycles, wherein each cycle comprises cleaning an interior of the plasma processing chamber and the chuck and forming a silicon oxide based coating on the interior of the plasma processing chamber and the chuck. The silicon oxide based coating has a first layer and a second layer.Type: GrantFiled: September 16, 2019Date of Patent: August 13, 2024Assignee: Lam Research CorporationInventors: Chiara Helena Catherina Giammanco MacPherson, Eric Pape
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Publication number: 20210340668Abstract: A method for conditioning a plasma processing chamber including a chuck is provided. The method comprises a plurality of cycles, wherein each cycle comprises cleaning an interior of the plasma processing chamber and the chuck and forming a silicon oxide based coating on the interior of the plasma processing chamber and the chuck. The silicon oxide based coating has a first layer and a second layer.Type: ApplicationFiled: September 16, 2019Publication date: November 4, 2021Inventors: Chiara Helena Catherina Giammanco MACPHERSON, Eric PAPE
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Patent number: 10978323Abstract: A substrate holder includes a base plate, a bond layer disposed over the base plate, and a ceramic layer disposed over the bond layer. The ceramic layer has a top surface including an area configured to support a substrate. A number of temperature measurement electrical devices are attached to the ceramic layer. Electrically conductive traces are embedded within the ceramic layer and positioned and routed to electrically connect with one or more of electrical contacts of the number of temperature measurement electrical devices. Electrical wires are disposed to electrically contact the electrically conductive traces. The electrical wires extend from the ceramic layer through the bond layer and through the base plate to a control circuit.Type: GrantFiled: January 14, 2019Date of Patent: April 13, 2021Assignee: Lam Research CorporationInventors: Eric Pape, Darrell Ehrlich, Mike Jing
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Publication number: 20190166700Abstract: A substrate processing system includes a processing chamber, a pedestal arranged in the processing chamber, and an electrostatic chuck (ESC) arranged on the pedestal. The ESC contains a printed circuit board assembly (PCBA) made up of a plurality of printed circuit board layers to mount circuitry that controls operation of the ESC. One or more of the printed circuit board layers includes a heater layer having one or more metal traces, which may be copper, to cover some or all of a surface of the heater layer sufficiently to provide heat to one or more of the remaining printed circuit board layers, to maintain the circuitry within a predetermined temperature range. The heat may be conducted directly among the various other printed circuit board layers, or may be conducted through vias in various ones of the printed circuit board layers.Type: ApplicationFiled: November 29, 2017Publication date: May 30, 2019Applicant: Lam Research CorporationInventors: Eric Pape, Changyou Jing, Fred Dennis Egley
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Patent number: 10306776Abstract: A substrate processing system includes a processing chamber, a pedestal arranged in the processing chamber, and an electrostatic chuck (ESC) arranged on the pedestal. The ESC contains a printed circuit board assembly (PCBA) made up of a plurality of printed circuit board layers to mount circuitry that controls operation of the ESC. One or more of the printed circuit board layers includes a heater layer having one or more metal traces, which may be copper, to cover some or all of a surface of the heater layer sufficiently to provide heat to one or more of the remaining printed circuit board layers, to maintain the circuitry within a predetermined temperature range. The heat may be conducted directly among the various other printed circuit board layers, or may be conducted through vias in various ones of the printed circuit board layers.Type: GrantFiled: November 29, 2017Date of Patent: May 28, 2019Assignee: LAM RESEARCH CORPORATIONInventors: Eric Pape, Changyou Jing, Fred Dennis Egley
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Publication number: 20190148190Abstract: A substrate holder includes a base plate, a bond layer disposed over the base plate, and a ceramic layer disposed over the bond layer. The ceramic layer has a top surface including an area configured to support a substrate. A number of temperature measurement electrical devices are attached to the ceramic layer. Electrically conductive traces are embedded within the ceramic layer and positioned and routed to electrically connect with one or more of electrical contacts of the number of temperature measurement electrical devices. Electrical wires are disposed to electrically contact the electrically conductive traces. The electrical wires extend from the ceramic layer through the bond layer and through the base plate to a control circuit.Type: ApplicationFiled: January 14, 2019Publication date: May 16, 2019Inventors: Eric Pape, Darrell Ehrlich, Mike Jing
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Patent number: 10186437Abstract: A substrate holder includes a base plate, a bond layer disposed over the base plate, and a ceramic layer disposed over the bond layer. The ceramic layer has a top surface including an area configured to support a substrate. A number of temperature measurement electrical devices are attached to the ceramic layer. Electrically conductive traces are embedded within the ceramic layer and positioned and routed to electrically connect with one or more of electrical contacts of the number of temperature measurement electrical devices. Electrical wires are disposed to electrically contact the electrically conductive traces. The electrical wires extend from the ceramic layer through the bond layer and through the base plate to a control circuit.Type: GrantFiled: October 5, 2015Date of Patent: January 22, 2019Assignee: Lam Research CorporationInventors: Eric Pape, Darrell Ehrlich, Mike Jing
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Publication number: 20180240649Abstract: A method for forming a protective coating for a component of plasma processing chamber is provided. A first ceramic coating is plasma sprayed over a surface of the component, wherein the first ceramic coating has pores. A sealant is applied over the first ceramic coating wherein sealant fills the pores of the first ceramic coating. The sealant is cured. A second ceramic coating is deposited over the first ceramic coating and sealant, wherein the second ceramic coating is thinner than and more dense than the first ceramic coating, wherein the depositing the second ceramic coating is by at least one of aerosol depositing or atomic layer deposition or sol-gel deposition.Type: ApplicationFiled: February 17, 2017Publication date: August 23, 2018Inventors: Jeremy SMITH, Eric PAPE, Devin RAMDUTT
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Publication number: 20170098564Abstract: A substrate holder includes a base plate, a bond layer disposed over the base plate, and a ceramic layer disposed over the bond layer. The ceramic layer has a top surface including an area configured to support a substrate. A number of temperature measurement electrical devices are attached to the ceramic layer. Electrically conductive traces are embedded within the ceramic layer and positioned and routed to electrically connect with one or more of electrical contacts of the number of temperature measurement electrical devices. Electrical wires are disposed to electrically contact the electrically conductive traces. The electrical wires extend from the ceramic layer through the bond layer and through the base plate to a control circuit.Type: ApplicationFiled: October 5, 2015Publication date: April 6, 2017Inventors: Eric Pape, Darrell Ehrlich, Mike Jing
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Patent number: 9012243Abstract: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system. The controller also receives critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data of the at least one previously processed wafers and the critical device parameters of the current wafer.Type: GrantFiled: August 27, 2014Date of Patent: April 21, 2015Assignee: Lam Research CorporationInventors: Yoshie Kimura, Tom Kamp, Eric Pape, Rohit DeshPande, Keith Gaff, Gowri Kamarthy
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Publication number: 20150053347Abstract: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system. The controller also receives critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data of the at least one previously processed wafers and the critical device parameters of the current wafer.Type: ApplicationFiled: August 27, 2014Publication date: February 26, 2015Inventors: Yoshie Kimura, Tom Kamp, Eric Pape, Rohit DeshPande, Keith Gaff, Gowri Kamarthy
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Patent number: 8852964Abstract: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system, and critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data, and the critical device parameters. The current wafer is trimmed during the target trim time while the temperature of each device die location is controlled based on the target temperature profile.Type: GrantFiled: February 4, 2013Date of Patent: October 7, 2014Assignee: Lam Research CorporationInventors: Yoshie Kimura, Tom Kamp, Eric Pape, Rohit DeshPande, Keith Gaff, Gowri Kamarthy
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Publication number: 20140220709Abstract: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system, and critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data, and the critical device parameters. The current wafer is trimmed during the target trim time while the temperature of each device die location is controlled based on the target temperature profile.Type: ApplicationFiled: February 4, 2013Publication date: August 7, 2014Applicant: LAM RESEARCH CORPORATIONInventors: Yoshie Kimura, Tom Kamp, Eric Pape, Rohit DeshPande, Keith Gaff, Gowri Kamarthy
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Publication number: 20140065835Abstract: A flexible polymer or elastomer coated RF return strap to be used in a plasma chamber to protect the RF strap from plasma generated radicals such as fluorine and oxygen radicals, and a method of processing a semiconductor substrate with reduced particle contamination in a plasma processing apparatus. The coated RF strap minimizes particle generation and exhibits lower erosion rates than an uncoated base component. Such a coated member having a flexible coating on a conductive flexible base component provides an RF ground return configured to allow movement of one or more electrodes in an adjustable gap capacitively coupled plasma reactor chamber.Type: ApplicationFiled: July 30, 2013Publication date: March 6, 2014Applicant: Lam Research CorporationInventors: Bobby Kadkhodayan, Jon McChesney, Eric Pape, Rajinder Dhindsa
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Patent number: 8522716Abstract: A flexible polymer or elastomer coated RF return strap to be used in a plasma chamber to protect the RF strap from plasma generated radicals such as fluorine and oxygen radicals, and a method of processing a semiconductor substrate with reduced particle contamination in a plasma processing apparatus. The coated RF strap minimizes particle generation and exhibits lower erosion rates than an uncoated base component. Such a coated member having a flexible coating on a conductive flexible base component provides an RF ground return configured to allow movement of one or more electrodes in an adjustable gap capacitively coupled plasma reactor chamber.Type: GrantFiled: February 9, 2009Date of Patent: September 3, 2013Assignee: Lam Research CorporationInventors: Bobby Kadkhodayan, Jon McChesney, Eric Pape, Rajinder Dhindsa
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Patent number: 8473089Abstract: A method for assessing health status of a processing chamber is provided. The method includes executing a recipe. The method also includes receiving processing data from a set of sensors during execution of the recipe. The method further includes analyzing the processing data utilizing a set of multi-variate predictive models. The method yet also includes generating a set of component wear data values. The method yet further includes comparing the set of component wear data values against a set of useful life threshold ranges. The method moreover includes generating a warning if the set of component wear data values is outside of the set of useful life threshold ranges.Type: GrantFiled: June 29, 2010Date of Patent: June 25, 2013Assignee: Lam Research CorporationInventors: Luc Albarede, Eric Pape, Vijayakumar C Venugopal, Brian D Choi
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Patent number: 8358416Abstract: A processing system having a chamber for in-situ optical interrogation of plasma emission to quantitatively measure normalized optical emission spectra is provided. The processing chamber includes a confinement ring assembly, a flash lamp, and a set of quartz windows. The processing chamber also includes a plurality of collimated optical assemblies, the plurality of collimated optical assemblies are optically coupled to the set of quartz windows. The processing chamber also includes a plurality of fiber optic bundles. The processing chamber also includes a multi-channel spectrometer, the multi-channel spectrometer is configured with at least a signal channel and a reference channel, the signal channel is optically coupled to at least the flash lamp, the set of quartz windows, the set of collimated optical assemblies, the illuminated fiber optic bundle, and the collection fiber optic bundle to measure a first signal.Type: GrantFiled: March 8, 2012Date of Patent: January 22, 2013Assignee: Lam Research CorporationInventors: Vijayakumar C. Venugopal, Eric Pape, Jean-Paul Booth
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Publication number: 20120170039Abstract: A processing system having a chamber for in-situ optical interrogation of plasma emission to quantitatively measure normalized optical emission spectra is provided. The processing chamber includes a confinement ring assembly, a flash lamp, and a set of quartz windows. The processing chamber also includes a plurality of collimated optical assemblies, the plurality of collimated optical assemblies are optically coupled to the set of quartz windows. The processing chamber also includes a plurality of fiber optic bundles. The processing chamber also includes a multi-channel spectrometer, the multi-channel spectrometer is configured with at least a signal channel and a reference channel, the signal channel is optically coupled to at least the flash lamp, the set of quartz windows, the set of collimated optical assemblies, the illuminated fiber optic bundle, and the collection fiber optic bundle to measure a first signal.Type: ApplicationFiled: March 8, 2012Publication date: July 5, 2012Inventors: Vijayakumar C. Venugopal, Eric Pape, Jean-Paul Booth
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Patent number: 8144328Abstract: An arrangement for in-situ optical interrogation of plasma emission to quantitatively measure normalized optical emission spectra in a plasma chamber is provided. The arrangement includes a flash lamp and a set of quartz windows. The arrangement also includes a plurality of collimated optical assemblies, which is optically coupled to the set of quartz windows. The arrangement further includes a plurality of fiber optic bundles, which comprises at least an illumination fiber optic bundle, a collection fiber optic bundle, and a reference fiber optic bundle. The arrangement more over includes a multi-channel spectrometer, which is configured with at least a signal channel and a reference channel. The signal channel is optically coupled to at least the flash lamp, the set of quartz windows, the set of collimated optical assemblies, the illuminated fiber optic bundle, and the collection fiber optic bundle to measure a first signal.Type: GrantFiled: April 3, 2009Date of Patent: March 27, 2012Assignee: Lam Research CorporationInventors: Vijayakumar C. Venugopal, Eric Pape, Jean-Paul Booth
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Patent number: 7952694Abstract: A disclosed device comprises an edge bonding seal configured to be mounted to an edge bead of the electrostatic chuck. The edge bonding seal includes a monitoring layer comprised of a first material configured to emit a species capable of being optically monitored. The edge bonding seal further includes an edge bonding layer configured to be interspersed at least between the monitoring layer and the plasma environment. The edge bonding layer is comprised of a second material susceptible to erosion due to reaction with the plasma environment and configured to expose the monitoring layer to the plasma environment upon sufficient exposure to the plasma environment.Type: GrantFiled: September 22, 2010Date of Patent: May 31, 2011Assignee: Lam Research CorporationInventors: Bradley J. Howard, Eric Pape, Siwen Li