Patents by Inventor Eric Pourquier
Eric Pourquier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12622123Abstract: A method for manufacturing an optoelectronic device includes providing a support supporting a plurality of three-dimensional semiconductor structures, forming a sacrificial portion under a first set of 3D structures of the plurality of three-dimensional semiconductor structures, forming a barrier portion around the sacrificial portion, said barrier portion having a basal wall extending under the sacrificial portion, and a lateral wall extending at the edge of the sacrificial portion, forming an access trench up to the sacrificial portion, the access trench extending continuously along the lateral wall of the barrier portion, etching the sacrificial portion from the access trench, and removing the first set of 3D structures.Type: GrantFiled: August 10, 2021Date of Patent: May 5, 2026Assignee: ALEDIAInventors: Xavier Hugon, Eric Pourquier, Frédéric Mayer, Thomas Lacave, Philippe Gibert, Mickaël Rebaud, Emmanuel Petitprez
-
Patent number: 12538617Abstract: One or more embodiments relate to a light-emitting diode and its manufacturing method. The diode includes at least one radial three-dimensional (3D) structure including a core having a first conductivity, and having a wire or pyramidal shape with edges substantially parallel or oblique to the direction z, an active region configured to emit light radiation, the active region including at least one radial part covering the edges of the core, a shell having a second conductivity, the light-emitting diode including a magnetic layer having a polarization along a main direction substantially parallel to the direction z, so as to increase a residence time at the active region of at least one among the first type and the second type of carriers.Type: GrantFiled: May 29, 2025Date of Patent: January 27, 2026Assignee: ALEDIAInventor: Eric Pourquier
-
Publication number: 20250374715Abstract: One or more embodiments relate to a light-emitting diode including at least one three-dimensional structure including: a first part having a first conductivity, a second part having a second conductivity, an active region configured to emit a light radiation, interposed between the first part and the second part, the diode also including: a first electrical contact configured to inject carriers into the first part, a second electrical contact configured to inject carriers into the second part. The diode includes a deceleration layer interposed between the first contact and the first part, configured to decelerate the carriers obtained from the first contact before being injected into the first part.Type: ApplicationFiled: May 30, 2025Publication date: December 4, 2025Applicant: ALEDIAInventor: Eric POURQUIER
-
Publication number: 20250374716Abstract: One or more embodiments relate to a light-emitting diode and its manufacturing method. The diode includes at least one radial three-dimensional (3D) structure including a core having a first conductivity, and having a wire or pyramidal shape with edges substantially parallel or oblique to the direction z, an active region configured to emit light radiation, the active region including at least one radial part covering the edges of the core, a shell having a second conductivity, the light-emitting diode including a magnetic layer having a polarization along a main direction substantially parallel to the direction z, so as to increase a residence time at the active region of at least one among the first type and the second type of carriers.Type: ApplicationFiled: May 29, 2025Publication date: December 4, 2025Applicant: ALEDIAInventor: Eric POURQUIER
-
Publication number: 20250113676Abstract: An optoelectronic device includes, in a stack, an emitting layer having optically active structures, configured to emit or receive radiation, a sensitive layer having at least one structure having a temperature resistance below a temperature Tmax below 200° C., a bond layer, and a transparent support layer. The bond layer is based on an inorganic low temperature bonding material. The bond layer also has cavities directly in line with the optically active structures, between the transparent support layer and the sensitive layer.Type: ApplicationFiled: September 30, 2024Publication date: April 3, 2025Applicant: ALEDIAInventors: Willy LUDURCZAK, Eric POURQUIER
-
Patent number: 12261249Abstract: A method of manufacturing an optoelectronic device including assemblies of light-emitting diodes (LED) having first and second assemblies and first blocks made of a first photoluminescent material, each covering one of the first assemblies. The method includes the forming of a layer covering the first and second assemblies, the delimiting of first openings in the layer to expose the first assemblies, the filling of the first openings with the first material, and the performing of a chemical-mechanical polishing to delimit the first blocks.Type: GrantFiled: October 1, 2020Date of Patent: March 25, 2025Assignee: AlediaInventors: Maxime Boistard, Philippe Gibert, Frédéric Mayer, Eric Pourquier, Sylvia Scaringella, Clémence Tallet
-
Publication number: 20240266483Abstract: An optoelectronic device for light display includes a support; light elements electrically connected to at least one first electrode and including a light-emitting diode of which a doped part is arranged in situation of electrical contact with the first electrode, the first electrode covering at least one upper part of the doped part arranged on the side opposite to the support face. Light confinement walls are configured to have an ability to reflect all or part of the light emitted by at least one of the light elements and being arranged so as to surround all or part of the at least one light element. The light confinement walls are electrically conductive and directly connected to the first electrode.Type: ApplicationFiled: May 31, 2021Publication date: August 8, 2024Inventors: Philippe GIBERT, Eric POURQUIER, Frédéric MAYER
-
Patent number: 12027643Abstract: A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.Type: GrantFiled: April 16, 2021Date of Patent: July 2, 2024Assignees: ALEDIA, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Eric Pourquier, Hubert Bono
-
Patent number: 11901482Abstract: The manufacture of an optoelectronic device includes the formation of light-emitting diodes where each one has a wire form, the formation of spacing walls made of a first dielectric material transparent to the light radiation originating from the diodes. The lateral sidewalls of each diode are surrounded by spacing walls. Light confinement walls are made of a second material adapted to block the light radiation originating from the diodes. The light confinement walls directly cover the lateral sidewalls of the spacing walls by being in contact with the wherein. A thin layer of the second material is deposited so as to directly cover the lateral sidewalls of the spacing walls by being in contact with the wherein and cover the upper border of the light-emitting diodes. The empty spaces delimited between the spacing walls at the level of the areas between the light-emitting diodes are also filled by the thin layer.Type: GrantFiled: June 19, 2019Date of Patent: February 13, 2024Assignee: ALEDIAInventors: Olivier Jeannin, Erwan Dornel, Eric Pourquier, Tiphaine Dupont
-
Publication number: 20240006398Abstract: A light-emitting diode for an optoelectronic device or for an optoelectronic member, the light-emitting diode including a semiconductor core, a semiconductor shell, an implanted portion delimiting within the semiconductor shell at least one passivated portion and at least one active portion, the at least one passivated portion having a conductivity strictly lower than a conductivity of said at least one active portion.Type: ApplicationFiled: June 22, 2023Publication date: January 4, 2024Inventors: Eric POURQUIER, Timothée LASSIAZ
-
Publication number: 20230378236Abstract: An optoelectronic device including a first circuit including at least one light-emitting diode emitting through a first surface of the first circuit and including first and second electrodes; a second circuit for controlling the light-emitting diode, positioned on a second surface of the first circuit opposite to the first surface, including first and second electrically-conductive pads; and an electrically-conductive layer located at the interface between the first and second circuits, the electrically-conductive layer being divided into first and second portions orthogonally to the stack of the first and second circuits, the first electrode being electrically coupled to the first conductive pad via the first portion of the conductive layer and the second electrode being electrically coupled to the second conductive pad via the second portion of the conductive layer.Type: ApplicationFiled: September 29, 2021Publication date: November 23, 2023Applicant: AlediaInventors: Ivan-Christophe Robin, Eric Pourquier, Bruno Mourey
-
Publication number: 20230307486Abstract: A method for manufacturing an optoelectronic device includes providing a support supporting a plurality of three-dimensional semiconductor structures, forming a sacrificial portion under a first set of 3D structures of the plurality of three-dimensional semiconductor structures, forming a barrier portion around the sacrificial portion, said barrier portion having a basal wall extending under the sacrificial portion, and a lateral wall extending at the edge of the sacrificial portion, forming an access trench up to the sacrificial portion, the access trench extending continuously along the lateral wall of the barrier portion, etching the sacrificial portion from the access trench, and removing the first set of 3D structures.Type: ApplicationFiled: August 10, 2021Publication date: September 28, 2023Inventors: Xavier HUGON, Eric POURQUIER, Frédéric MAYER, Thomas LACAVE, Philippe GIBERT, Mickae?l REBAUD, Emmanuel PETITPREZ
-
Patent number: 11769856Abstract: The manufacture of an optoelectronic device includes the formation of wire-like shaped light-emitting diodes and the formation of spacing walls transparent to the light radiation originating from the diodes. The lateral sidewalls of each diode are surrounded by at least one of the spacing walls. Light confinement walls directly cover the lateral sidewalls of the spacing walls by being in contact with the latter. The radiation originating from each diode and directed in the direction of the adjacent diodes is blocked by the confinement wall. The upper borders of the diodes are covered by the light confinement material so as to ensure a light extraction by the rear face of the optoelectronic device. An optoelectronic device is also described as such.Type: GrantFiled: June 19, 2019Date of Patent: September 26, 2023Assignee: ALEDIAInventors: Olivier Jeannin, Erwan Dornel, Eric Pourquier, Tiphaine Dupont
-
Patent number: 11581294Abstract: An optoelectronic device including: a first circuit including a substrate having first and second opposite faces, the first circuit having display pixels, each display pixel having, on the side of the first face, a first light-emitting diode having a first active region adapted to emit a first radiation and, extending from the second face, a second light-emitting diode having a second active region adapted to emit a second radiation, the surface area, viewed from a direction orthogonal to the first face, of the first active region being at least twice as big as the surface area, viewed from the direction, of the second active region; and a second circuit bonded to the first circuit on the side of the first light-emitting diode and electrically linked to the first and second light-emitting diodes.Type: GrantFiled: June 21, 2018Date of Patent: February 14, 2023Assignee: AlediaInventors: Wei Sin Tan, Philippe Gilet, Eric Pourquier, Zine Bouhamri, Pamela Rueda Fonseca
-
Publication number: 20220367762Abstract: A method of manufacturing an optoelectronic device including assemblies of light-emitting diodes (LED) having first and second assemblies and first blocks made of a first photoluminescent material, each covering one of the first assemblies. The method includes the forming of a layer covering the first and second assemblies, the delimiting of first openings in the layer to expose the first assemblies, the filling of the first openings with the first material, and the performing of a chemical-mechanical polishing to delimit the first blocks.Type: ApplicationFiled: October 1, 2020Publication date: November 17, 2022Applicant: AlediaInventors: Maxime Boistard, Philippe Gibert, Frédéric Mayer, Eric Pourquier, Sylvia Scaringella, Clémence Tallet
-
Patent number: 11489088Abstract: There is described an optoelectronic device where each light-emitting diode has a wire-like shape. Spacing walls are formed so that the lateral sidewalls of each light-emitting diode are surrounded by at least one of the spacing walls. Light confinement walls directly cover the lateral sidewalls of the spacing walls by being in contact with the latter. The spacing walls have a convex-shaped outer face. At least one of the spacing walls has, over a lower portion, a thickness that increases when getting away from the substrate. They have, over an upper portion, a thickness that decreases at the level of the upper border of the light-emitting diode when getting away from the substrate. The light confinement walls have an inner face having a concave shape matching with the convex shape and directed towards the light-emitting diode for which it confines the light radiation thereof.Type: GrantFiled: June 19, 2019Date of Patent: November 1, 2022Assignee: ALEDIAInventors: Olivier Jeannin, Erwan Dornel, Eric Pourquier, Tiphaine Dupont
-
Patent number: 11195878Abstract: An optoelectronic device including a first optoelectronic circuit bonded to a second electronic circuit. The second electronic circuit includes conductive pads. The first optoelectronic circuit includes, for each pixel: at least first and second three-dimensional semiconductor elements extending over a first conductive layer and having the same height; first active areas resting on the first semiconductor elements and capable of emitting or receiving a first electromagnetic radiation; second active areas resting on the second semiconductor elements and capable of emitting or receiving a second electromagnetic radiation; and second, third, and fourth conductive layers electrically coupled to the conductive pads, the second, third, and fourth conductive layers being respectively coupled to the first active areas, to the second active areas, and to the first conductive layer.Type: GrantFiled: June 28, 2018Date of Patent: December 7, 2021Assignee: AlediaInventor: Eric Pourquier
-
Publication number: 20210366983Abstract: The manufacture of an optoelectronic device includes the formation of wire-like shaped light-emitting diodes and the formation of spacing walls transparent to the light radiation originating from the diodes. The lateral sidewalls of each diode are surrounded by at least one of the spacing walls. Light confinement walls directly cover the lateral sidewalls of the spacing walls by being in contact with the latter. The radiation originating from each diode and directed in the direction of the adjacent diodes is blocked by the confinement wall. The upper borders of the diodes are covered by the light confinement material so as to ensure a light extraction by the rear face of the optoelectronic device. An optoelectronic device is also described as such.Type: ApplicationFiled: June 19, 2019Publication date: November 25, 2021Inventors: Olivier JEANNIN, Erwan DORNEL, Eric POURQUIER, Tiphaine DUPONT
-
Patent number: 11171267Abstract: The invention relates to a method for producing an optoelectronic device (1) including a matrix array of light-emitting diodes (4) and a plurality of photoluminescent pads (61, 62, 63 . . . ) that are each located facing at least some of said light-emitting diodes (4), including the following steps: forming said plurality of photoluminescent pads (61, 62, 63 . . . ) by photolithography from at least one photoresist (51, 52, 53 . . . ) containing photoluminescent particles, said photoresist having been deposited beforehand on a supporting surface (3; 3?); forming reflective walls (101, 102, 103 . . . ) covering lateral flanks (81, 82, 83 . . . ) of said photoluminescent pads (61, 62, 63 . . . ) by deposition of at least one thin-layer section (91, 92, 93 . . . ) on the lateral flanks.Type: GrantFiled: December 22, 2017Date of Patent: November 9, 2021Assignee: ALEDIAInventors: Eric Pourquier, Philippe Gilet, Chang Ying-Lan
-
Publication number: 20210313497Abstract: An optoelectronic device including a first optoelectronic circuit bonded to a second electronic circuit. The second electronic circuit includes conductive pads. The first optoelectronic circuit includes, for each pixel: at least first and second three-dimensional semiconductor elements extending over a first conductive layer and having the same height; first active areas resting on the first semiconductor elements and capable of emitting or receiving a first electromagnetic radiation; second active areas resting on the second semiconductor elements and capable of emitting or receiving a second electromagnetic radiation; and second, third, and fourth conductive layers electrically coupled to the conductive pads, the second, third, and fourth conductive layers being respectively coupled to the first active areas, to the second active areas, and to the first conductive layer.Type: ApplicationFiled: June 28, 2018Publication date: October 7, 2021Applicant: AlediaInventor: Eric Pourquier