Abstract: Embodiments include a device, comprising: a column line; a plurality of pixels; each pixel coupled to the column line; a comparator having an input coupled to the column line and configured to compare a signal from the column line to a threshold; and control logic coupled to the pixels and configured to selectively couple each pixel to the column line after a sampling period for each pixel.

Abstract: Some embodiments of the present disclosure are directed to an image sensor pixel that is configured for gateless reset of a floating diffusion. Some embodiments are directed to an image sensor comprising a plurality of pixels, at least one pixel comprising a floating diffusion formed in a semiconductor substrate; a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion; and a reset drain formed in the semiconductor substrate and spaced away from the floating diffusion by an intervening semiconductor region having a dopant type opposite to the dopant type of the reset drain and the floating diffusion, wherein the reset drain is configured to selectively reset the electrostatic potential of the floating diffusion in response to a voltage pulse applied to the reset drain.

Abstract: Some embodiments relate to an image sensor pixel comprising a transfer gate formed on a first surface of a semiconductor substrate, a floating diffusion formed in the first surface of the semiconductor substrate, and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially beneath the transfer gate. The transfer gate is spaced away from the floating diffusion such that an intervening semiconductor region provides a potential barrier to charge flow from beneath the transfer gate to the floating diffusion. The transfer gate is operable to control a vertical pump gate to selectively transfer charge from the charge accumulation/storage region to the floating diffusion by pumping charge from the buried charge accumulation/storage region underlying the transfer gate, over the potential barrier, and out to the floating diffusion, such that full charge transfer can be achieved without overlapping the edge of the transfer gate with the floating diffusion.

Abstract: Some embodiments provide methods and apparatus for quantum random number generation based on a single bit or multi bit Quanta Image Sensor (QIS) providing single-photon counting over a time interval for each of an array of pixels of the QIS, wherein random number data is generated based on the number of photons counted over the time interval for each of the pixels.

Abstract: Some embodiments provide an image sensor color filter array pattern that mitigates and/or minimizes the impact of optical and carrier crosstalk on color reproduction accuracy and/or signal-to-noise, the color filter array comprising a plurality of kernels, wherein each kernel has an identical configuration of color filter elements comprising primary color filter elements corresponding to at least three respective different primary colors, and a plurality of secondary color filter elements. A respective one of the secondary color filter elements is disposed as a nearest neighbor to and between every pair of primary color filter elements of different colors in the kernel, with the respective secondary color filter element representing a secondary color that is a combination of the different colors of the primary color filter elements that are nearest neighbors to the respective secondary color filter element.

Abstract: Some embodiments provide an image sensor pixel comprising a junction field effect transistor (JFET) and a floating diffusion configured to act as the gate of the JFET. An image sensor may comprise a plurality of pixels, at least one pixel comprising a floating diffusion region formed in a semiconductor substrate, a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion, and a JFET having (i) a source and a drain coupled by a channel region, and (ii) a gate comprising the floating diffusion region.

Abstract: Some embodiments relate to an image sensor pixel comprising a transfer gate formed on a first surface of a semiconductor substrate, a floating diffusion formed in the first surface of the semiconductor substrate, and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially beneath the transfer gate. The transfer gate is spaced away from the floating diffusion such that an intervening semiconductor region provides a potential barrier to charge flow from beneath the transfer gate to the floating diffusion. The transfer gate is operable to control a vertical pump gate to selectively transfer charge from the charge accumulation/storage region to the floating diffusion by pumping charge from the buried charge accumulation/storage region underlying the transfer gate, over the potential barrier, and out to the floating diffusion, such that full charge transfer can be achieved without overlapping the edge of the transfer gate with the floating diffusion.

Abstract: Some embodiments of the present disclosure are directed to an image sensor pixel that is configured for gateless reset of a floating diffusion. Some embodiments are directed to an image sensor comprising a plurality of pixels, at least one pixel comprising a floating diffusion formed in a semiconductor substrate; a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion; and a reset drain formed in the semiconductor substrate and spaced away from the floating diffusion by an intervening semiconductor region having a dopant type opposite to the dopant type of the reset drain and the floating diffusion, wherein the reset drain is configured to selectively reset the electrostatic potential of the floating diffusion in response to a voltage pulse applied to the reset drain.

Abstract: Some embodiments provide a Quanta Image Sensor (QIS) comprising 3D vertically-stacked photosensor array and readout circuitry. In some embodiments, an imaging array comprises a plurality of single-bit or multi-bit jots, and readout circuitry in electrical communication with the imaging array and configured to quantize, for each jot, an analog signal corresponding to the electrical signal of the jot, wherein the imaging system is configured as a 3D vertically integrated circuit with the imaging array stacked vertically above the readout circuitry. The imaging array may be configured as an array of clusters with respect to the readout circuitry, each cluster configured as an array of n by m jots. The imaging array may include a further image processing circuitry layer disposed below the readout circuitry layer. Neighboring layers may be implemented on separate substrates and/or in a common substrate.

Abstract: Some embodiments provide a color image sensor and color image sampling method that uses multiple-layer pixels and is capable of producing color images without using absorption color filters (e.g., such as employed in conventional CFAs). In accordance with some embodiments of the color image sensor device and color image sampling method, frequency-dependent reflectors are incorporated between the photodetection layers of multiple-layer (e.g., two layer) pixels.

Abstract: Embodiments include a device, comprising: a column line; a plurality of pixels; each pixel coupled to the column line; a comparator having an input coupled to the column line and configured to compare a signal from the column line to a threshold; and control logic coupled to the pixels and configured to selectively couple each pixel to the column line after a sampling period for each pixel.

Abstract: Some embodiments provide an image sensor that includes (i) quanta image sensor having an array of jots and configured for spatial and temporal oversampling, and (ii) a polarization filter array monolithically integrated with the quanta image sensor, so as to provide for a polarization image sensor. The image sensor may also include a color filter array.

Abstract: Some embodiments of the present disclosure provide a semiconductor-based photon-counting sensor comprising a metal-insulator-semiconductor internal photoemission (e.g., thermionic-emission) detector formed on and/or in a first surface of a semiconductor substrate, and at least one jot formed on and/or in a second side of a semiconductor substrate. The at least one MIS photoemission detector and the at least one jot are configured such that a photocarrier generated in response to a photon incident on the MIS thermionic-emission detector is readout by the at least one jot.

Abstract: Some embodiments provide an image sensor color filter array pattern that mitigates and/or minimizes the impact of optical and carrier crosstalk on color reproduction accuracy and/or signal-to-noise, the color filter array comprising a plurality of kernels, wherein each kernel has an identical configuration of color filter elements comprising primary color filter elements corresponding to at least three respective different primary colors, and a plurality of secondary color filter elements. A respective one of the secondary color filter elements is disposed as a nearest neighbor to and between every pair of primary color filter elements of different colors in the kernel, with the respective secondary color filter element representing a secondary color that is a combination of the different colors of the primary color filter dements that are nearest neighbors to the respective secondary color filter element.

Abstract: Some embodiments provide an image sensor pixel comprising a junction field effect transistor (JFET) and a floating diffusion configured to act as the gate of the JFET. An image sensor may comprise a plurality of pixels, at least one pixel comprising a floating diffusion region formed in a semiconductor substrate, a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion, and a JFET having (i) a source and a drain coupled by a channel region, and (ii) a gate comprising the floating diffusion region.

Abstract: Some embodiments of the present disclosure are directed to an image sensor pixel that is configured for gateless reset of a floating diffusion. Some embodiments are directed to an image sensor comprising a plurality of pixels, at least one pixel comprising a floating diffusion formed in a semiconductor substrate; a transfer gate configured to selectively cause transfer of photocharge stored in the pixel to the floating diffusion; and a reset drain formed in the semiconductor substrate and spaced away from the floating diffusion by an intervening semiconductor region having a dopant type opposite to the dopant type of the reset drain and the floating diffusion, wherein the reset drain is configured to selectively reset the electrostatic potential of the floating diffusion in response to a voltage pulse applied to the reset drain.

Abstract: The present disclosure relates generally to apparatus and methods for image sensing, and, more particularly, to a multi-bit quanta image sensor (QIS) having a controllable (e.g., adjustably variable) exposure response characteristic. Some embodiments provide an apparatus and method wherein the non-linearity of the response of a multi-bit QIS is controllable (e.g., selectively variable) by dynamically choosing the bit depth n during AID conversion, and/or later (i.e., post-conversion) by firmware and/or software.

Abstract: Some embodiments provide a color image sensor and color image sampling method that uses multiple-layer pixels and is capable of producing color images without using absorption color filters (e.g., such as employed in conventional CFAs). In accordance with some embodiments of the color image sensor device and color image sampling method, frequency-dependent reflectors are incorporated between the photodetection layers of multiple-layer (e.g., two layer) pixels.

Abstract: Image sensor pixels having low full-well capacity and high sensitivity for applications such as DIS, qDIS, single/multi bit QIS. Some embodiments provide an image sensor pixel architecture, comprises a transfer gate, a floating diffusion region both formed on a first surface of a semiconductor substrate and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially or entirely beneath the transfer gate. Image sensor may also comprise an array of pixels, wherein each pixel comprises: a vertical bipolar structure including an emitter, base, collector configured for storing photocarriers in the base; and a reset transistor coupled to the base, configured to be completely reset of all free carriers using the reset transistor. The emitter may be configured as a pinning layer to facilitate full depletion of the base. Such image sensor pixels may have a full well capacity less than that giving good signal-to-noise ratio (SNR).

Abstract: An imaging system has an imager comprising a plurality of jots. A readout circuit is in electrical communication with the imager. The readout circuit can be configured to facilitate the formation of an image by defining neighborhoods of the jots, wherein a local density of exposed jots within a neighborhood is used to generate a digital value for a pixel of the image.