Patents by Inventor Eric Siragusa

Eric Siragusa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pipelined analog-to-digital converter
    Patent number: 8928517
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: January 6, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Scott Bardsley, Franklin Murden, Peter Derounian, Eric Siragusa
  • PHASED-ARRAY CHARGE PUMP SUPPLY
    Publication number: 20140340140
    Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.
    Type: Application
    Filed: August 4, 2014
    Publication date: November 20, 2014
    Applicant: ANALOG DEVICES, INC.
    Inventors: Eric SIRAGUSA, Franklin MURDEN, Jonathan AUDY
  • Phased-array charge pump supply
    Patent number: 8829980
    Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: September 9, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Eric Siragusa, Franklin Murden, Jonathan Audy
  • Pipelined analog-to-digital converter
    Patent number: 8368576
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: February 5, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Scott Bardsley, Franklin Murden, Eric Siragusa, Peter Derounian
  • PIPELINED ANALOG-TO-DIGITAL CONVERTER
    Publication number: 20120274497
    Abstract: An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Scott BARDSLEY, Franklin MURDEN, Eric SIRAGUSA, Peter DEROUNIAN
  • PHASED-ARRAY CHARGE PUMP SUPPLY
    Publication number: 20120242401
    Abstract: A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal.
    Type: Application
    Filed: August 22, 2011
    Publication date: September 27, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: Eric SIRAGUSA, Franklin MURDEN, Jonathan AUDY