Abstract: One Time Programmable (OTP) memory structures and methods for pretesting the support circuitry are provided. A group of dedicated test cells associated with one or more groups of regular OTP cells are used to test the support circuitry for the regular OTP cells. The dedicated cells are programmed and read. The read values are compared to the programmed values or expected values. As a result of the comparison, failing memories may be designated “Not Usable”, while regular OTP cells of passing memories can be programmed for their purpose resulting in elimination of wasted memories during test.

Abstract: A chip has formed thereon integrated circuit elements, which include a main circuit and an associated non volatile memory structure. A test result associated with prior testing of a function of the main circuit is stored in the non volatile memory structure. Additional apparatus and methods are disclosed.

Abstract: Manufacturing methods, testing, and RFID integrated circuit wafers that have been so prepared. A function of an integrated circuit can be tested. If the test fails, a control function of the tested circuit is disabled.

Abstract: According to one embodiment, a method of testing an integrated circuit is provided. The quiescent current measuring of an integrated circuit is measured at two voltages. The functional relationship between the current measurements is determined and compared against a predetermined functional relationship to determine whether a defect exists in the integrated circuit.

Abstract: According to one embodiment, a method of testing an integrated circuit is provided. A reference voltage is coupled to each of a first and second comparator integrated on the chip. A supply voltage is compared to the reference voltage in a comparator to determine overvoltage or undervoltage conditions. The results of the comparison are stored and sizing and placing of at least one decoupling circuit in the circuit design is made based on the stored determinations.

Abstract: A method of manufacturing a semiconductor integrated circuit includes providing a fabricated integrated circuit on a wafer. A test fixture is connected to unencapsulated pads on the integrated circuit to monitor an operating parameter for the circuit and to determine a unique identifier for the die. The parameter is analyzed in post processing.

Abstract: A structure for programming a memory cell on an integrated circuit provides access at multiple mask levels of the integrated circuit to each of the programming voltages which may be used to program the memory cell. In an embodiment, the structure includes a conductive signal path extending through multiple horizontally conductive layers of the integrated circuit from a programming voltage pad (or node) to an input of the memory cell. The conductive signal path includes portions selected from multiple alternate path portions formed within the multiple horizontally conductive layers through which the signal path extends. An embodiment of a method for making a mask includes selecting one of multiple configurations of the programming structure portion to be formed using the mask. A computer-usable carrier medium may include digital representations of the alternative configurations for a programming structure portion from which a programming structure pattern may be selected.

Abstract: A portable or wearable cytometer that can be used at remote locations, such as in the field or at home. The flow cytometer of the present invention may help improve the healthcare of many weak, sick or elderly people by providing early detection of infection. By detecting the infection early, the infection may be more readily treatable. In military applications, the portable cytometer of the present invention may help save lives by providing early detection of infection due to biological agents.

Abstract: A fluid driving system for portable flow cytometers or other portable devices that accepts a less precise and less stable pressure source, and then adjusts the pressure in a closed-loop manner to maintain a constant, desired flow velocity. The fluid driving system may be used in portable or wearable cytometers for use in remote locations, such as at home or in the field.

Abstract: A process for efficiently programming a programmable logic device (PLD) is provided. A basis set for a desired matrix of programming pattern ("pattern matrix") is a set of row patterns from which all the row patterns of the pattern matrix can be derived by applying a Boolean operation on two or more row patterns of the basis set. The disclosed process derives a minimal basis set, i.e., a set with the smallest number of row patterns among basis sets for the given pattern matrix.

Abstract: A method and apparatus for checking the integrity of a device tester used in the manufacture of semiconductor devices. A device tester is used to exercise different aspects of a semiconductor device. The tester is programmed with appropriate control software that fully tests the electrical and functional characteristics of the semiconductor device.

Abstract: A method and apparatus for testing an integrated circuit device. An integrated circuit device undergoes testing in at least two different stages of the manufacturing process. At one stage, the semiconductor wafer containing multiple chip dice is probed by a probe tester that tests each of the dice individually. At another stage, after an individual chip die has been encapsulated in a package, a package tester tests and exercises the functions of the chip.

Abstract: A circuit that provides for digitally programmable high voltage drive, as well as fast current limiting capability for testing of integrated circuits. The circuit also provides for digitally programmable slew rate control for controlling the rise and fall times of an output voltage. Integrated circuits requiring low voltage and high voltage tests at different speeds and with different current limiting conditions, or low and high current forcing with different voltage clamp levels, or a mixture of the two can be tested in a single continuous test pattern using the circuit of the present invention.