Patents by Inventor Etai Zaltsman

Etai Zaltsman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9098445
    Abstract: A method includes, in a memory controller that controls a memory, evaluating an available memory space remaining in the memory to write data. A redundant storage configuration is selected in the memory controller depending on the available memory space. Redundancy information is calculated over the data using the selected redundant storage configuration. The data and the redundancy information are written to the available memory space in the memory.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 4, 2015
    Assignee: Apple Inc.
    Inventors: Avraham Poza Meir, Oren Golov, Sasha Paley, Ori Moshe Stern, Etai Zaltsman
  • Publication number: 20150106410
    Abstract: An apparatus includes a non-volatile memory and a processor. The processor is configured to receive, from a host, commands for storage of data in the non-volatile memory, to further receive from the host, for storage in the non-volatile memory, File System (FS) information that specifies organization of the data in a FS of the host, to receive from the host a directive that grants the processor permission and capability to access and modify the FS information, and to access the FS information, using the directive, so as to manage the storage of the data in the non-volatile memory.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 16, 2015
    Applicant: Apple Inc.
    Inventors: Etai Zaltsman, Sasha Paley, Avraham Poza Meir
  • Patent number: 8914670
    Abstract: A method includes, in a non-volatile memory that includes multiple memory blocks, defining a redundancy zone that includes at least an old parity block, a new parity block and multiple active blocks of which one block is defined as an open block. Data is stored in the redundancy zone and the stored data is protected, such that new input data is stored in the open block, redundancy information for the active blocks including the open block is stored in the new parity block, and the redundancy information for the active blocks excluding the open block is stored in the old parity block. Upon filling the open block and the new parity block, an alternative block is assigned to serve as the open block and the new parity block is assigned to serve as the old parity block.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: December 16, 2014
    Assignee: Apple Inc.
    Inventors: Etai Zaltsman, Julian Vlaiko, Ori Moshe Stern, Avraham Poza Meir
  • Publication number: 20140359198
    Abstract: A method includes, in a storage device that stores data for a host in a memory, estimating an impact of an amount of free memory space in the memory on a storage performance of the storage device. The storage device sends to the host a notification that is indicative of the estimated impact.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 4, 2014
    Applicant: Apple Inc.
    Inventors: Etai Zaltsman, Ori Moshe Stern, Sasha Paley
  • Publication number: 20140355347
    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.
    Type: Application
    Filed: April 10, 2014
    Publication date: December 4, 2014
    Applicant: Apple Inc.
    Inventors: Yael Shur, Yoav Kasorla, Moshe Neerman, Naftali Sommer, Avraham Poza Meir, Etai Zaltsman, Eyal Gurgi, Meir Dalal
  • Publication number: 20140281801
    Abstract: A method includes, in a memory controller that controls a memory, evaluating an available memory space remaining in the memory to write data. A redundant storage configuration is selected in the memory controller depending on the available memory space. Redundancy information is calculated over the data using the selected redundant storage configuration. The data and the redundancy information are written to the available memory space in the memory.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Avraham Poza Meir, Oren Golov, Sasha Paley, Ori Moshe Stern, Etai Zaltsman
  • Publication number: 20140129874
    Abstract: A method includes, in a non-volatile memory that includes multiple memory blocks, defining a redundancy zone that includes at least an old parity block, a new parity block and multiple active blocks of which one block is defined as an open block. Data is stored in the redundancy zone and the stored data is protected, such that new input data is stored in the open block, redundancy information for the active blocks including the open block is stored in the new parity block, and the redundancy information for the active blocks excluding the open block is stored in the old parity block. Upon filling the open block and the new parity block, an alternative block is assigned to serve as the open block and the new parity block is assigned to serve as the old parity block.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 8, 2014
    Applicant: APPLE INC.
    Inventors: Etai Zaltsman, Julian Vlaiko, Ori Moshe Stern, Avraham Poza Meir
  • Publication number: 20140059270
    Abstract: A method in a storage device includes receiving from a host storage commands for execution in a non-volatile memory of the storage device. At least a subset of the storage commands are to be executed in accordance with an order-of-arrival in which the storage commands in the subset are received. The received storage commands are executed in the non-volatile memory in accordance with internal scheduling criteria of the storage device, which permit deviations from the order-of-arrival, but such that execution of the storage commands in the subset reflects the order-of-arrival to the host.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 27, 2014
    Inventors: Etai Zaltsman, Oren Golov, Ori Moshe Stern, Shai Ojalvo
  • Patent number: 7573884
    Abstract: A novel apparatus and method of packet re-sequencing applicable to systems wherein packets are assigned sequence numbers and transmitted over multiple channels with the requirement they be re-ordered at the receiving side. The mechanism is particularly suitable for use in cable systems adapted to implement the DOCSIS 3.0 specification which permits the bonding of a plurality of downstream channels into a single virtual high data rate pipe. In operation, received packets are stored in a memory whereby a pointer to the memory storage location is written into a context table diagram in accordance with the sequence number extracted from the packet. Packets are released in sequence order regardless of the order in which they were received.
    Type: Grant
    Filed: March 4, 2007
    Date of Patent: August 11, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Amos Klimker, Liran Brecher, Etai Zaltsman
  • Publication number: 20080263348
    Abstract: A novel asymmetric memory partitioning mechanism for providing resolving and reducing memory limitations when an increase in software image size is required. Two partitions are created in non-volatile memory, one smaller than the other. The smaller partition stores a degenerated version of the full-functionality software comprising only essential program code for booting the device and repeating the download and installation procedures until the full-functionality software image is successfully installed in non-volatile memory. The larger portion stores a full-functionality version of the software comprising both essential and non-essential program code. The mechanism also provides the capability of converting devices already deployed in the field. The legacy symmetrical partitioning of the memory in these devices is removed and replaced with asymmetrical partitioning, wherein the smaller partition stores the degenerated software image and the larger partition stores the full-functionality software image.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 23, 2008
    Inventors: Etai Zaltsman, Eran Genzel, Adam Lapid, Ran Senderovitz
  • Publication number: 20080120667
    Abstract: A novel cable gateway system and architecture incorporating a hybrid digital video transceiver. The digital cable system architecture combines reception of legacy video such as MPEG-TS based DVB-C streams with that of original IP video over DOCSIS channels. The system comprises a hybrid DVB/IP cable gateway STB capable of receiving both legacy DVB-C video and original IP video streams. The cable gateway device performs the front-end functionality (including QAM receiver, tuner and broadband connection) while the back-end functionality of video decoding and display is performed by one or more standard IP-STBs connected to the cable gateway device over a network (e.g., home LAN). Legacy MPEG-TS based DVB-C video is captured and encapsulated into packets for distribution over the network to the IP-STBs. The cable gateway distributes the original IP video received over the CATV source and the encapsulated legacy video as video over IP packets over the network.
    Type: Application
    Filed: October 29, 2007
    Publication date: May 22, 2008
    Inventor: Etai Zaltsman
  • Publication number: 20070206600
    Abstract: A novel apparatus and method of packet re-sequencing applicable to systems wherein packets are assigned sequence numbers and transmitted over multiple channels with the requirement they be re-ordered at the receiving side. The mechanism is particularly suitable for use in cable systems adapted to implement the DOCSIS 3.0 specification which permits the bonding of a plurality of downstream channels into a single virtual high data rate pipe. In operation, received packets are stored in a memory whereby a pointer to the memory storage location is written into a context table diagram in accordance with the sequence number extracted from the packet. Packets are released in sequence order regardless of the order in which they were received.
    Type: Application
    Filed: March 4, 2007
    Publication date: September 6, 2007
    Inventors: Amos Klimker, Liran Brecher, Etai Zaltsman
  • Publication number: 20050022247
    Abstract: A cable network includes a cable modem termination system at the head end of a cable network, which transmits digitized video data and digitized data, according to a Data Over Cable System Interface Standard (DOCSIS), from sources external to the cable network downstream to a cable subscriber's set-top box over a selected downstream channel. The set-top box includes a single downstream tuner for selecting the digitized video data and DOCSIS data over the selected downstream channel.
    Type: Application
    Filed: July 21, 2004
    Publication date: January 27, 2005
    Inventors: Yigal Bitran, Etai Zaltsman, Itay Sherman
  • Publication number: 20040100979
    Abstract: A method and system are provided for improving performance in a communication system comprising: receiving a plurality of data packets from a transmitter; generating a queue of a plurality of acknowledgements each indicating receipt of one or more of the data packets; and sending only the last acknowledgement in the queue to the transmitter to indicate receipt of all of the data packets for which acknowledgements are queued. Other systems and methods are disclosed.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 27, 2004
    Inventors: Jeffrey Bernard Mandin, Mariano Schain, Etai Zaltsman, Arik Gal, Lior Storfer
  • Patent number: 6553074
    Abstract: A method and device for combating logarithmic quantization and Robbed Bit Signaling (RBS) impairments that..are typical to PCM telephone lines is descried. An apparatus is described which includes a front-end unit which receives samples of the digital PCM line, an impairment identifier unit which identifies samples that have a high likelihood to have, large impairments due to the PCM line, an impairment estimator unit which estimates the value of impairment caused by the digital line, a samples reconstructor unit which fixes received samples by subtracting from them the value of the estimated impairment and an output unit transfers the reconstructed samples to a receiver. The method allows improving signal quality at the output of the PCM line, and thus improving data rates and robustness of digital communication receivers, and particularly of V.34 receivers, or V.90 transceivers that are digitally linked to the PCM, line.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: April 22, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Ofir Shalvi, Zvi Reznic, Etai Zaltsman