Patents by Inventor Etienne Menard

Etienne Menard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10355113
    Abstract: In an aspect, the present invention provides stretchable, and optionally printable, components such as semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed, and related methods of making or tuning such stretchable components. Stretchable semiconductors and electronic circuits preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention are adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 16, 2019
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: John A. Rogers, Matthew Meitl, Yugang Sun, Heung Cho Ko, Andrew Carlson, Won Mook Choi, Mark Stoykovich, Hanqing Jiang, Yonggang Huang, Ralph G. Nuzzo, Zhengtao Zhu, Etienne Menard, Dahl-Young Khang
  • Publication number: 20190137143
    Abstract: The present invention relates to a tracking photovoltaic solar system comprising at least a tracker unit maintaining an array of photovoltaic modules (101) aligned to the sun during the course of the day.
    Type: Application
    Filed: April 25, 2017
    Publication date: May 9, 2019
    Inventor: Etienne Menard
  • Publication number: 20190088690
    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.
    Type: Application
    Filed: November 15, 2018
    Publication date: March 21, 2019
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr
  • Patent number: 10204864
    Abstract: The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 12, 2019
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: John A. Rogers, Dahl-Young Khang, Yugang Sun, Etienne Menard
  • Patent number: 10189243
    Abstract: In a method of printing a transferable component, a stamp including an elastomeric post having three-dimensional relief features protruding from a surface thereof is pressed against a component on a donor substrate with a first pressure that is sufficient to mechanically deform the relief features and a region of the post between the relief features to contact the component over a first contact area. The stamp is retracted from the donor substrate such that the component is adhered to the stamp. The stamp including the component adhered thereto is pressed against a receiving substrate with a second pressure that is less than the first pressure to contact the component over a second contact area that is smaller than the first contact area. The stamp is then retracted from the receiving substrate to delaminate the component from the stamp and print the component onto the receiving substrate. Related apparatus and stamps are also discussed.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: January 29, 2019
    Inventors: Etienne Menard, John A. Rogers, Seok Kim, Andrew Carlson
  • Patent number: 10181483
    Abstract: A method of printing transferable components includes pressing a stamp including at least one transferable semiconductor component thereon on a target substrate such that the at least one transferable component and a surface of the target substrate contact opposite surfaces of a conductive eutectic layer. During pressing of the stamp on the target substrate, the at least one transferable component is exposed to electromagnetic radiation that is directed through the transfer stamp to reflow the eutectic layer. The stamp is then separated from the target substrate to delaminate the at least one transferable component from the stamp and print the at least one transferable component onto the surface of the target substrate. Related systems and methods are also discussed.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: January 15, 2019
    Inventors: Etienne Menard, Matthew Meitl, John A. Rogers
  • Patent number: 10163945
    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 25, 2018
    Assignee: X-Celeprint Limited
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr
  • Patent number: 10103685
    Abstract: A tracking photovoltaic solar system, and methods for installing or for using such tracking comprising at least a dual axis tracker unit maintaining an array of photovoltaic modules aligned to the sun. Said tracker unit includes: a pair of sub-frames supporting photovoltaic modules, a torque tube supporting said subframes rotating around a primary rotation axis, a pole structure fixed and extending vertically above an anchoring basis and being rotatively connected to said longitudinal support, secondary rotating means controlling the orientation of said sub-frames around corresponding secondary rotation axis of said sub-frames, said secondary rotation axis being orthogonal to said primary rotation axis and actuators means for controlling said primary and secondary rotating means. The secondary rotation axis are located at each end of said torque tube, said pole structure being central with regard to said sub-frames and said actuators means of both primary and secondary rotating means are linear.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: October 16, 2018
    Assignee: Helioslite
    Inventor: Etienne Menard
  • Publication number: 20180130829
    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 10, 2018
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr
  • Patent number: 9923133
    Abstract: A substrate includes an anchor area physically secured to a surface of the substrate and at least one printable electronic component. The at least one printable electronic component includes an active layer having one or more active elements thereon, and is suspended over the surface of the substrate by electrically conductive breakable tethers. The electrically conductive breakable tethers include an insulating layer and a conductive layer thereon that physically secure and electrically connect the at least one printable electronic component to the anchor area, and are configured to be preferentially fractured responsive to pressure applied thereto. Related methods of fabrication and testing are also discussed.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: March 20, 2018
    Assignee: X-Celeprint Limited
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl
  • Patent number: 9899432
    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: February 20, 2018
    Assignee: X-Celeprint Limited
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr
  • Publication number: 20170309733
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Application
    Filed: June 30, 2017
    Publication date: October 26, 2017
    Inventors: Ralph G. NUZZO, John A. ROGERS, Etienne MENARD, Keon Jae LEE, Dahl-Young KHANG, Yugang SUN, Matthew MEITL, Zhengtao ZHU
  • Patent number: 9768086
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: September 19, 2017
    Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
    Inventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu
  • Patent number: 9761444
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: September 12, 2017
    Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS
    Inventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu
  • Publication number: 20170200679
    Abstract: The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
    Type: Application
    Filed: October 31, 2016
    Publication date: July 13, 2017
    Inventors: John A. ROGERS, Dahl-Young KHANG, Yugang SUN, Etienne MENARD
  • Publication number: 20170179356
    Abstract: Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities.
    Type: Application
    Filed: January 10, 2017
    Publication date: June 22, 2017
    Inventors: John ROGERS, Ralph NUZZO, Matthew MEITL, Etienne MENARD, Alfred BACA, Michael MOTALA, Jong-Hyun AHN, Sang-Il PARK, Chang-Jae YU, Heung Cho KO, Mark STOYKOVICH, Jongseung YOON
  • Publication number: 20170179085
    Abstract: Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities.
    Type: Application
    Filed: January 10, 2017
    Publication date: June 22, 2017
    Inventors: John ROGERS, Ralph NUZZO, Matthew MEITL, Etienne MENARD, Alfred BACA, Michael MOTALA, Jong-Hyun AHN, Sang-Il PARK, Chang-Jae YU, Heung Cho KO, Mark STOYKOVICH, Jongseung YOON
  • Publication number: 20170179100
    Abstract: Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities.
    Type: Application
    Filed: January 10, 2017
    Publication date: June 22, 2017
    Inventors: John ROGERS, Ralph NUZZO, Matthew MEITL, Etienne MENARD, Alfred BACA, Michael MOTALA, Jong-Hyun AHN, Sang-Il PARK, Chang-Jae YU, Heung Cho KO, Mark STOYKOVICH, Jongseung YOON
  • Patent number: 9660008
    Abstract: A large-format substrate with distributed control elements is formed by providing a substrate and a wafer, the wafer having a plurality of separate, independent chiplets formed thereon; imaging the wafer and analyzing the wafer image to determine which of the chiplets are defective; removing the defective chiplet(s) from the wafer leaving remaining chiplets in place on the wafer; printing the remaining chiplet(s) onto the substrate forming empty chiplet location(s); and printing additional chiplet(s) from the same or a different wafer into the empty chiplet location(s).
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: May 23, 2017
    Assignee: Semprius, Inc.
    Inventors: Christopher Bower, Etienne Menard, John Hamer, Ronald S. Cok
  • Publication number: 20170133412
    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.
    Type: Application
    Filed: August 22, 2016
    Publication date: May 11, 2017
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr