Patents by Inventor Etsuo Morita

Etsuo Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140235037
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Application
    Filed: April 23, 2014
    Publication date: August 21, 2014
    Applicant: SONY CORPORATION
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 8741451
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7727331
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: June 1, 2010
    Assignee: Sony Corporation
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7364805
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: April 29, 2008
    Assignee: Sony Corporation
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20080050599
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Application
    Filed: October 23, 2007
    Publication date: February 28, 2008
    Applicant: Sony Corporation
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7294201
    Abstract: A crystal substrate and a crystal film of a III-V compound of the nitride system which are manufactured easily and have few dislocations as well as a method of manufacturing a crystal and a method of manufacturing a device with the use thereof are disclosed. On a basal body, formed in order are a base crystal layer of, for example, gallium nitride (GaN), a first mask pattern of, for example, silicon dioxide (SiO2), an intermediate crystal layer of, for example, gallium nitride, a second mask pattern of, for example, silicon dioxide, and a top crystal layer of, for example, gallium nitride. The first and second mask patterns have stripes arranged at least in one direction at unequally spaced intervals. The stripes are different in pitch from pattern to pattern. Thus, the mask patterns at least partly overlie one another in the direction of the thickness of the crystal layers.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: November 13, 2007
    Assignee: Sony Corporation
    Inventor: Etsuo Morita
  • Patent number: 7244308
    Abstract: A crystal substrate and a crystal film of a III-V compound of the nitride system which have no defects in the surfaces. A method of manufacturing a crystal of a III-V compound of the nitride system, and a method of manufacturing a device. A base crystal layer is formed over a basal body. After etching the base crystal layer using a first mask pattern, an intermediate crystal layer is formed. After etching the intermediate crystal layer using a second mask pattern, a top crystal layer is formed. The crystal growth of the intermediate crystal layer starts at the walls of grooves formed by etching in the base crystal layer. This reduces the possibility that dislocations develop into the intermediate crystal layer. No dislocations occurring above the first mask pattern propagate through the top crystal layer since the dislocations are removed by etching using the second mask pattern.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: July 17, 2007
    Assignee: Sony Corporation
    Inventor: Etsuo Morita
  • Publication number: 20070125996
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Application
    Filed: January 31, 2007
    Publication date: June 7, 2007
    Applicant: Sony Corporation
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7125736
    Abstract: To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: October 24, 2006
    Assignee: Sony Corporation
    Inventor: Etsuo Morita
  • Patent number: 7033854
    Abstract: To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: April 25, 2006
    Assignee: Sony Corporation
    Inventor: Etsuo Morita
  • Patent number: 6967353
    Abstract: A semiconductor light emitting device includes a crystal layer formed on a substrate, the crystal layer having a tilt crystal plane tilted from the principal plane of the substrate, and a first conductive type layer, an active layer, and a second conductive type layer, which are formed on the crystal layer in such a manner as to extend within planes parallel to the tilt crystal plane, wherein the device has a shape formed by removing the apex and its vicinity of the stacked layer structure formed on the substrate. Such a semiconductor light emitting device is excellent in luminous efficiency even if the device has a three-dimensional device structure. The present invention also provides a method of fabricating the above semiconductor light emitting device.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: November 22, 2005
    Assignee: Sony Corporation
    Inventors: Jun Suzuki, Hiroyuki Okuyama, Goshi Biwa, Etsuo Morita
  • Publication number: 20050196888
    Abstract: To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.
    Type: Application
    Filed: April 25, 2005
    Publication date: September 8, 2005
    Inventor: Etsuo Morita
  • Patent number: 6727523
    Abstract: A base crystal layer is formed on the surface of a basal body by growing, e.g., GaN comprising a III-V compound by MOCVD and then the base crystal layer 12 is etched. An intermediate crystal layer is formed by laterally growing GaN from windows formed in the base crystal layer by etching. In the intermediate crystal layer, an inner layer made of, e.g., AlGaN is formed. Then, the intermediate crystal layer is further etched and a top crystal layer is formed by laterally growing GaN from windows formed in the intermediate crystal layer by etching. An inner layer made of, e.g., AlGaN is formed in the top crystal layer. Development of dislocations is suppressed to some extent by the lateral growth when forming the intermediate crystal layer and the top crystal layer. Further, development of dislocations is suppressed by the inner layers.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: April 27, 2004
    Assignee: Sony Corporation
    Inventor: Etsuo Morita
  • Publication number: 20040067648
    Abstract: A crystal foundation having dislocations is used to obtain a crystal film of low dislocation density, a crystal substrate, and a semiconductor device. One side of a growth substrate (11) is provided with a crystal layer (13) with a buffer layer (12) in between. The crystal layer (13) has spaces (13a), (13b) in an end of each threading dislocation D1 elongating from below. The threading dislocation D1 is separated from the upper layer by the spaces (13a), (13b), so that each threading dislocation D1 is blocked from propagating to the upper layer. When the displacement of the threading dislocation D1 expressed by Burgers vector is preserved to develop another dislocation, the spaces (13a), (13b) vary the direction of its displacement. As a result, the upper layer above the spaces (13a), (13b) turns crystalline with a low dislocation density.
    Type: Application
    Filed: November 20, 2003
    Publication date: April 8, 2004
    Inventors: Etsuo Morita, Yousuke Murakami, Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20030180977
    Abstract: A semiconductor light emitting device includes a crystal layer formed on a substrate, the crystal layer having a tilt crystal plane tilted from the principal plane of the substrate, and a first conductive type layer, an active layer, and a second conductive type layer, which are formed on the crystal layer in such a manner as to extend within planes parallel to the tilt crystal plane, wherein the device has a shape formed by removing the apex and its vicinity of the stacked layer structure formed on the substrate. Such a semiconductor light emitting device is excellent in luminous efficiency even if the device has a three-dimensional device structure. The present invention also provides a method of fabricating the above semiconductor light emitting device.
    Type: Application
    Filed: January 14, 2003
    Publication date: September 25, 2003
    Inventors: June Suzuki, Hiroyuki Okuyama, Goshi Biwa, Etsuo Morita
  • Publication number: 20030073315
    Abstract: A base crystal layer is formed on the surface of a basal body by growing, e.g., GaN comprising a III-Vcompound by MOCVD and then the base crystal layer 12 is etched. An intermediate crystal layer is formed by laterally growing GaN from windows formed in the base crystal layer by etching. In the intermediate crystal layer, an inner layer made of, e.g., AlGaN is formed. Then, the intermediate crystal layer is further etched and a top crystal layer is formed by laterally growing GaN from windows formed in the intermediate crystal layer by etching. An inner layer made of, e.g., AlGaN is formed in the top crystal layer. Development of dislocations is suppressed to some extent by the lateral growth when forming the intermediate crystal layer and the top crystal layer. Further, development of dislocations is suppressed by the inner layers.
    Type: Application
    Filed: November 8, 2002
    Publication date: April 17, 2003
    Inventor: Etsuo Morita
  • Patent number: 6501154
    Abstract: There are provided a semiconductor substrate and a semiconductor laser using the semiconductor substrate which promises smooth and optically excellent cleaved surfaces and is suitable for fabricating semiconductor lasers using nitride III-V compound semiconductors. Using a semiconductor substrate, such as GaN substrate, having a major surface substantially normal to a {0001}-oriented face, e.g. {01-10}-oriented face or {11-20}-oriented face, or offset within ±5° from these faces, nitride III-V compound semiconductor layers are epitaxially grown on the substrate to form a laser structure. To make cavity edges, the GaN substrate is cleaved together with the overlying III-V compound semiconductor layers along high-cleavable {0001}-oriented faces.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: December 31, 2002
    Assignee: Sony Corporation
    Inventors: Etsuo Morita, Masao Ikeda, Hiroji Kawai
  • Patent number: 6498048
    Abstract: A base crystal layer is formed on the surface of a basal body by growing, e.g., GaN comprising a III-V compound by MOCVD and then the base crystal layer 12 is etched. An intermediate crystal layer is formed by laterally growing GaN from windows formed in the base crystal layer by etching. In the intermediate crystal layer, an inner layer made of, e.g., AlGaN is formed. Then, the intermediate crystal layer is further etched and a top crystal layer is formed by laterally growing GaN from windows formed in the intermediate crystal layer by etching. An inner layer made of, e.g., AlGaN is formed in the top crystal layer. Development of dislocations is suppressed to some extent by the lateral growth when forming the intermediate crystal layer and the top crystal layer. Further, development of dislocations is suppressed by the inner layers.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: December 24, 2002
    Assignee: Sony Corporation
    Inventor: Etsuo Morita
  • Publication number: 20020146856
    Abstract: In a semiconductor device such as GaN semiconductor laser having an electrode formed on a nitride III-V compound semiconductor layer containing at least Ga, such as GaN layer, at least a part of the electrode in contact with the nitride III-V compound semiconductor layer is made of a &ggr;-GaNi alloy or a &ggr;′-GaNi alloy. The electrode is made by first stacking the &ggr;-GaNi alloy layer or &ggr;′-GaNi alloy layer, or its component elements, on the nitride III-V compound semiconductor layer, and then annealing it at a temperature not lower than 680° C., or by stacking any of them on the nitride-compound III-V compound semiconductor layer heated to a temperature not lower than 680° C. At least a part of the electrode in contact with the nitride III-V compound semiconductor layer may be made of an alloy of Ga and at least one kind of element selected from the group consisting of Pt, Ag, Pd, Mg, Hf, Al, Cr, Ti, Mo, W, Zr, Si and Ge.
    Type: Application
    Filed: April 8, 2002
    Publication date: October 10, 2002
    Inventor: Etsuo Morita
  • Publication number: 20020081800
    Abstract: In a semiconductor device such as GaN semiconductor laser having an electrode formed on a nitride III-V compound semiconductor layer containing at least Ga, such as GaN layer, at least a part of the electrode in contact with the nitride III-V compound semiconductor layer is made of a &ggr;-GaNi alloy or a &ggr;′-GaNi alloy. The electrode is made by first stacking the &ggr;-GaNi alloy layer or &ggr;′-GaNi alloy layer, or its component elements, on the nitride III-V compound semiconductor layer, and then annealing it at a temperature not lower than 680° C., or by stacking any of them on the nitride-compound III-V compound semiconductor layer heated to a temperature not lower than 680° C. At least a part of the electrode in contact with the nitride III-V compound smiconductor layer may be made of an alloy of Ga and at least one kind of element selected from the group consisting of Pt, Ag, Pd, Mg, Hf, Al, Cr, Ti, Mo, W, Zr, Si and Ge.
    Type: Application
    Filed: July 26, 1999
    Publication date: June 27, 2002
    Inventor: ETSUO MORITA