Patents by Inventor Eugene Roberts

Eugene Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250008948
    Abstract: Disclosed is a method for coating flower heads to prevent or slow down, infection of flower heads during storage and transport to final retail, using a coating composition containing a polyvinyl acetate homopolymer and water, and optionally comprising a spacing agent, the composition being in the form of a dispersion.
    Type: Application
    Filed: September 20, 2024
    Publication date: January 9, 2025
    Inventors: Victor Steven MONSTER, Eugene Robert VAN DEN BERG, Glenn Gareth GROENEWEGEN
  • Patent number: 11444455
    Abstract: In certain aspects of the disclosure, a protection circuit includes a first input/output (I/O) pin, a second I/O pad, a shunt clamp coupled to the first I/O pad, and a resistor coupled between the shunt clamp and the second I/O pad. The resistor has a first dynamic resistance at a voltage of 100 millivolts across the resistor, the resistor has a second dynamic resistance at a voltage of three volts across the resistor, and the second dynamic resistance is at least five times greater than the first dynamic resistance.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: September 13, 2022
    Inventor: Eugene Robert Worley
  • Publication number: 20220202029
    Abstract: Disclosed is an edible composition for coating fresh harvest products and a harvest product coated with said composition, to a method for coating an harvest product, and to the use of the edible composition for the preparation of a post-harvest fruit or vegetable item with prolonged shelf life and/or slower weight loss compared to a fruit or vegetable item which is not coated with the composition and to the use of the edible composition for the preparation of a post-harvest cut flower with prolonged vase life when coated with the composition compared to a comparable cut flower which is not coated with the composition.
    Type: Application
    Filed: May 6, 2020
    Publication date: June 30, 2022
    Inventors: Victor Steven MONSTER, Eugene Robert VAN DEN BERG, Glenn Gareth GROENEWEGEN
  • Publication number: 20210076669
    Abstract: Disclosed is a composition for coating flower heads to prevent or slow down, infection of flower heads during storage and transport to final retail, and a use of the coating composition. The disclosure also relates to a flower coated with said composition. The disclosure is especially suitable for flower heads of roses and rose buds.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 18, 2021
    Inventors: Victor Steven MONSTER, Eugene Robert VAN DEN BERG, Glenn Gareth GROENEWEGEN
  • Patent number: 10889515
    Abstract: In one embodiment, hydrodynamic cavitation lyses influent bacteria, releasing intracellular enzymes, and creates CaCO3 seed crystals that are discharged at the base of the water column. Bottom-dwelling upflow anaerobic sludge blanket (UASB)-like granules grow in a dense, viscous N, P & Ca++ rich fluid (“hydrolytic brine”). The brine hydrolyzes ancient sludge and fresh solids into simple liquids. The granules convert hydrolyzed liquids into gas. New CaCO3 seeds grow at the produced gas/supernatant interface and propagate across the entire lagoon. Once the sludge inventory is digested, there is an excess of granules that modulate their gross productivity in response to substrate load, pH, and temperature. In one specific example, the treated lagoon has no odor, is free of gelled sludge and effluent.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: January 12, 2021
    Assignee: BLUE FROG TECHNOLOGIES LLC
    Inventors: Griscom Bettle, III, Ricky Eugene Roberts, James Rhrodrick Key
  • Publication number: 20200329725
    Abstract: Disclosed is to composition for coating fruit and a method for coating fruit, by applying post-harvest to said fruit a coating composition containing a linear homopolymer or copolymer of vinyl alcohol and a polyol spacing agent. The post-harvest fruit exhibits enhanced gloss when coated with the composition compared to a fruit item which is not coated with the composition and/or slower weight loss compared to a fruit which is not coated with the composition.
    Type: Application
    Filed: December 27, 2018
    Publication date: October 22, 2020
    Inventors: Victor Steven MONSTER, Dick VAN VELZEN, Eugene Robert VAN DEN BERG, Glenn Gareth GROENEWEGEN
  • Publication number: 20200259326
    Abstract: In certain aspects of the disclosure, a protection circuit includes a first input/output (I/O) pin, a second I/O pad, a shunt clamp coupled to the first I/O pad, and a resistor coupled between the shunt clamp and the second I/O pad. The resistor has a first dynamic resistance at a voltage of 100 millivolts across the resistor, the resistor has a second dynamic resistance at a voltage of three volts across the resistor, and the second dynamic resistance is at least five times greater than the first dynamic resistance.
    Type: Application
    Filed: February 3, 2020
    Publication date: August 13, 2020
    Inventor: Eugene Robert Worley
  • Patent number: 10316746
    Abstract: A system includes a turbine combustor having a first volume configured to receive a combustion fluid and to direct the combustion fluid into a combustion chamber. The turbine combustor includes a second volume configured to receive a first flow of an exhaust gas and to direct the first flow of the exhaust gas into the combustion chamber. The turbine combustor also includes a third volume disposed axially downstream from the first volume and circumferentially about the second volume. The third volume is configured to receive a second flow of the exhaust gas and to direct the second flow of the exhaust gas out of the turbine combustor via an extraction outlet, and the third volume is isolated from the first volume and from the second volume.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: June 11, 2019
    Assignees: General Electric Company, ExxonMobil Upstream Research Company
    Inventors: Jonathan Kay Allen, Bradford David Borchert, Jesse Edwin Trout, Ilya Aleksandrovich Slobodyanskiy, Almaz Valeev, Igor Petrovich Sidko, Matthew Eugene Roberts, Leonid Yul'evich Ginesin
  • Patent number: 10298010
    Abstract: A method of protecting a serializer/deserializer (SERDES) differential input/output (I/O) circuit includes detecting an electrostatic discharge event. The method also includes selectively disengaging a power supply terminal from a pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event. The method further includes selectively disengaging a ground terminal from the pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 21, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Eugene Robert Worley, Reza Jalilizeinali, Sreeker Dundigal, Wen-Yi Chen, Krishna Chaitanya Chillara, Taeghyun Kang
  • Publication number: 20180317509
    Abstract: Disclosed is a method for coating fruit to inhibit or prevent maturation and ripening of climacteric fruit during post-harvest storage and transport, a fruit item having a coating which inhibits or prevents maturation and ripening of the fruit item during post-harvest storage and transport, and a composition for coating fruit post-harvest to prevent or slow down maturation and ripening of climacteric fruit. The disclosure is in particular suitable for mangos, citrus fruit and bananas.
    Type: Application
    Filed: December 9, 2016
    Publication date: November 8, 2018
    Inventors: Dick VAN VELZEN, Johan Louis VAN DER LUIT, Victor Steven MONSTER, Eugene Robert VAN DEN BERG
  • Patent number: 9929698
    Abstract: An apparatus is described. The apparatus includes an input device. The apparatus also includes a positive supply voltage pad. The apparatus further includes an input signal pad. The apparatus also includes a ground pad. The apparatus further includes charged-device model protection circuitry that protects the input device from electrostatic discharge. The charged-device model protection circuitry includes at least one of de-Q circuitry and a cascode device.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 27, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Prasad Srinivasa Siva Gudem, Himanshu Khatri, Devavrata V Godbole, Eugene Robert Worley
  • Patent number: 9853446
    Abstract: An intergrated circuit (IC) package includes a die, a package substrate coupled to the die, and a first electrostatic discharge (ESD) protection component coupled to the package substrate, where the first electrostatic discharge (ESD) protection component is configured to provide package level electrostatic discharge (ESD) protection. In some implementations, the first electrostatic discharge (ESD) protection component is embedded in the package substrate. In some implementations, the die includes an internal electrostatic discharge (ESD) protection component configured to provide die level electrostatic discharge (ESD) protection. In some implementations, the internal electrostatic discharge (ESD) protection component and the first electrostatic discharge (ESD) protection component are configured to provide cumulative electrostatic discharge (ESD) protection for the die.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: December 26, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Shiqun Gu, Eugene Robert Worley, Ratibor Radojcic, Urmi Ray
  • Publication number: 20170288398
    Abstract: A method of protecting a serializer/deserializer (SERDES) differential input/output (I/O) circuit includes detecting an electrostatic discharge event. The method also includes selectively disengaging a power supply terminal from a pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event. The method further includes selectively disengaging a ground terminal from the pair of I/O transistors of the SERDES differential I/O circuit in response to the detected electrostatic discharge event.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: Eugene Robert WORLEY, Reza JALILIZEINALI, Sreeker DUNDIGAL, Wen-Yi CHEN, Krishna Chaitanya CHILLARA, Taeghyun KANG
  • Publication number: 20170063079
    Abstract: An integrated circuit (IC) package includes a die, a package substrate coupled to the die, and a first electrostatic discharge (ESD) protection component coupled to the package substrate, where the first electrostatic discharge (ESD) protection component is configured to provide package level electrostatic discharge (ESD) protection. In some implementations, the first electrostatic discharge (ESD) protection component is embedded in the package substrate. In some implementations, the die includes an internal electrostatic discharge (ESD) protection component configured to provide die level electrostatic discharge (ESD) protection. In some implementations, the internal electrostatic discharge (ESD) protection component and the first electrostatic discharge (ESD) protection component are configured to provide cumulative electrostatic discharge (ESD) protection for the die.
    Type: Application
    Filed: August 27, 2015
    Publication date: March 2, 2017
    Inventors: Shiqun Gu, Eugene Robert Worley, Ratibor Radojcic, Urmi Ray
  • Patent number: 9559640
    Abstract: A CMOS amplifier including electrostatic discharge (ESD) protection circuits is disclosed. In one embodiment, the CMOS amplifier may include a PMOS transistor, a NMOS transistor, primary protection diodes, and one or more auxiliary protection diodes to limit a voltage difference between terminals of the CMOS amplifier. In some embodiments, the auxiliary protection diodes may limit the voltage difference between an input terminal of the CMOS amplifier and a supply voltage, the input terminal of the CMOS amplifier and ground, and the input terminal and the output terminal of the CMOS amplifier.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: January 31, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Eugene Robert Worley, Dongling Pan, Li-Chung Chang
  • Publication number: 20160278882
    Abstract: A system for fabricating a customized appliance for the orthodontic treatment of teeth, comprising forming an appliance comprising plural cavities each shaped to conform to the crown of a tooth and customized extensions which are chemically bonded to thermoformed aligners in a dental repositioning system. These extensions facilitate rigid and precise attachment of aligners to auxiliary devices such as TADs (Temporary Anchorage Devices) or are used as a mechanism to strengthen the aligner in specific areas. This facilitates simultaneous wear of aligners and sectional braces for the treatment of dental malocclusions.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 29, 2016
    Inventors: Ian Kitching, Sammel Shahrier Alauddin, W. Eugene Roberts, Rodrigo F. Viecilli, Stephen Tracey
  • Publication number: 20160254789
    Abstract: A CMOS amplifier including electrostatic discharge (ESD) protection circuits is disclosed. In one embodiment, the CMOS amplifier may include a PMOS transistor, a NMOS transistor, primary protection diodes, and one or more auxiliary protection diodes to limit a voltage difference between terminals of the CMOS amplifier. In some embodiments, the auxiliary protection diodes may limit the voltage difference between an input terminal of the CMOS amplifier and a supply voltage, the input terminal of the CMOS amplifier and ground, and the input terminal and the output terminal of the CMOS amplifier.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 1, 2016
    Inventors: Ahmed Abdel Monem Youssef, Prasad Srinivasa Siva Gudem, Eugene Robert Worley, Dongling Pan, Li-Chung Chang
  • Patent number: 9421502
    Abstract: Systems and methods for treatment of wastewater in waste processing ponds and other enclosed bodies of water are provided. An aerator are configured to include a first set of concentric air hoses disposed at a first position between the water outflow lip and the water intake, the first set of concentric air hoses being in fluid communication with an air inlet disposed at a position on the upper float chassis above the surface level of the water; and a second set of concentric air hoses disposed at a second position between the water first set of concentric air hoses and the water intake, the second set of concentric air hoses being in fluid communication with the air inlet, wherein the first set of concentric air hoses and the second set of concentric air hoses emit jets of air bubbles into the water column between the water intake and the water outflow lip.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: August 23, 2016
    Assignee: ABSOLUTE AERATION
    Inventors: Griscom Bettle, III, James Rhrodrick Key, Ricky Eugene Roberts
  • Publication number: 20160222884
    Abstract: A system includes a turbine combustor having a first volume configured to receive a combustion fluid and to direct the combustion fluid into a combustion chamber. The turbine combustor includes a second volume configured to receive a first flow of an exhaust gas and to direct the first flow of the exhaust gas into the combustion chamber. The turbine combustor also includes a third volume disposed axially downstream from the first volume and circumferentially about the second volume. The third volume is configured to receive a second flow of the exhaust gas and to direct the second flow of the exhaust gas out of the turbine combustor via an extraction outlet, and the third volume is isolated from the first volume and from the second volume.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 4, 2016
    Inventors: Jonathan Kay Allen, Bradford David Borchert, Jesse Edwin Trout, Ilya Aleksandrovich Slobodyanskiy, Almaz Valeev, Igor Petrovich Sidko, Matthew Eugene Roberts, Leonid Yulk'evich Ginesin
  • Patent number: 9406627
    Abstract: A system interconnect includes a first resistor-capacitor (RC) clamp having a first RC time constant. The system interconnect also includes second RC clamps having a second RC time constant. The first and second RC clamps are arranged along the system interconnect. In addition, the first RC time constant is different from the second RC time constant.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: August 2, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Eugene Robert Worley, Reza Jalilizeinali, Sreeker Dundigal