Patents by Inventor Eugene Youjun Chen

Eugene Youjun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6233172
    Abstract: An improved and novel magnetic element (10; 10′; 50; 50′; 80) including a plurality of thin film layers wherein the bit end magneto-static demagnetizing fields cancel the total positive coupling of the structure to obtain dual magnetic states in a zero external field. Additionally disclosed is a method of fabricating a magnetic element (10) by providing a plurality of thin film layers wherein the bit end magneto-static demagnetizing fields of the thin film layers cancel the total positive coupling of the structure to obtain dual magnetic states in a zero external field.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: May 15, 2001
    Assignee: Motorola, Inc.
    Inventors: Eugene Youjun Chen, Jon Michael Slaughter, Mark Durlam, Mark DeHerrera, Saied N. Tehrani
  • Patent number: 6211090
    Abstract: A method of fabricating a flux concentrator for use in magnetic memory devices including the steps of providing at least one magnetic memory bit (10) and forming proximate thereto a material stack defining a copper (Cu) damascene bit line (56) including a flux concentrating layer (52). The method includes the steps of depositing a bottom dielectric layer (32), an optional etch stop (34) layer, and a top dielectric layer (36) proximate the magnetic memory bit (10). A trench (38) is etched in the top dielectric layer (36) and the bottom dielectric layer (32). A first barrier layer (42) is deposited in the trench (38). Next, a metal system (29) is deposited on a surface of the first barrier layer (42). The metal system (29) includes a copper (Cu) seed material (44), and a plated copper (Cu) material (46), a first outside barrier layer (50), a flux concentrating layer (52), and a second outside barrier layer (54). The metal system (29) is patterned and etched to define a copper (Cu) damascene bit line (56).
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: April 3, 2001
    Assignee: Motorola, Inc.
    Inventors: Mark Durlam, Eugene Youjun Chen, Saied N. Tehrani, Jon Michael Slaughter, Gloria Kerszykowski, Kelly Wayne Kyler