Abstract: A metal-insulator-metal (MIM) capacitor includes a lower electrode, a dielectric layer, and an upper electrode. The lower electrode includes a first conductive layer, a chemical barrier layer on the first conductive layer, and a second conductive layer on the chemical barrier layer. The chemical barrier layer is between the first and second conductive layers and is a different material than the first and second conductive layers. The dielectric layer is on the lower electrode. The upper electrode is on the dielectric layer opposite to the lower electrode. The first and second conductive layers can have the same thickness. The chemical barrier layer can be thinner than each of the first and second conductive layers. Related methods are discussed.

Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.

Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.

Abstract: In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.

Abstract: A multi-dielectric film including at least one first dielectric film that is a composite film made of zirconium-hafnium-oxide and at least one second dielectric film that is a metal oxide film made of amorphous metal oxide. Adjacent ones of the dielectric films are made of different materials.

Abstract: A semiconductor device including a multilayer dielectric film and a method for fabricating the semiconductor device are disclosed. The multilayer dielectric film includes a type-one dielectric film having a tetragonal crystalline structure, wherein the type-one dielectric film comprises a first substance. The multilayer dielectric film also comprises a type-two dielectric film also having a tetragonal crystalline structure, wherein the type-two dielectric film comprises a second substance different from the first substance and a dielectric constant of the type-two dielectric film is greater than a dielectric constant of the type-one dielectric film.

Abstract: A method of forming a dielectric layer in a capacitor adapted for use in a semiconductor device is disclosed. The method includes forming a first ZrO2 layer, forming an interfacial layer using a plasma treatment on the first ZrO2 layer, and forming a second ZrO2 layer on the interfacial layer.

Abstract: Provided is an in-situ method of cleaning a vaporizer of an atomic layer deposition apparatus during a dielectric layer deposition process, to prevent nozzle blocking in the vaporizer and an atomic layer deposition apparatus. During the dielectric layer deposition process, the following steps are repeated: supplying a first source gas for dielectric layer deposition into a chamber of an atomic layer deposition apparatus; purging the first source gas; supplying a second source gas into the chamber of the atomic layer deposition apparatus; purging the second source gas, the in-situ method of cleaning the vaporizer is performed after supplying the first source gas for dielectric layer deposition and before supplying the first source gas again.

Abstract: A capacitor includes a first electrode having a conductive pattern and an anti-oxidation pattern contacting the conductive pattern and a second electrode overlapping the first electrode. The capacitor further includes a capacitor dielectric layer disposed between the first and second electrodes, and having a blanket dielectric layer and a partial dielectric layer. The blanket dielectric layer is disposed between the first and second electrodes, and the partial dielectric layer is disposed between the blanket dielectric layer and the anti-oxidation pattern.

Abstract: In one embodiment, a phase change memory device includes an insulation structure over a substrate. The insulation structure ahs an opening defined therethrough. A first layer pattern is formed on sidewalls and a bottom of the opening. A second layer pattern is formed on the first layer pattern and substantially fills the opening.

Abstract: A semiconductor device includes a lower electrode of a capacitor, a dielectric layer disposed on the lower electrode, and an upper electrode of the capacitor disposed on the dielectric layer. The upper electrode includes a doped poly-Si1-xGex layer. An interlayer insulating layer is disposed on the doped poly-Si1-xGex layer and has a contact hole partially exposing the doped poly-Si1-xGex layer. A metal contact plug is in the contact hole and an interconnection layer is disposed on the interlayer insulating layer and connected to the metal contact plug. Related interconnection structures and fabrication methods are also disclosed.

Abstract: A method of forming a semiconductor device includes loading a semiconductor substrate into a reaction chamber, and providing metal organic precursors including hafnium and zirconium into the reaction chamber to form hafnium-zirconium oxide (HfxZr1-xO; 0<X<1) with a tetragonal crystalline structure on the semiconductor substrate. Related structures are also discussed.

Abstract: Methods of forming capacitor structures may include forming an insulating layer on a substrate, forming a first capacitor electrode on the insulating layer, forming a capacitor dielectric layer on portions of the first capacitor electrode, and forming a second capacitor electrode on the capacitor dielectric layer such that the capacitor dielectric layer is between the first and second capacitor electrodes. More particularly, the first capacitor electrode may define a cavity therein wherein the cavity has a first portion parallel with respect to the substrate and a second portion perpendicular with respect to the substrate. Related structures are also discussed.

Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.

Abstract: In a method of forming a layer and a method of manufacturing a capacitor using the same, a preliminary zirconium oxide film is formed on a substrate by introducing a first reactant including a zirconium precursor, and a first oxidant onto the substrate. A thermal treatment is performed on the preliminary zirconium oxide film to form a first zirconium oxide film having a dense and crystalline structure. An aluminum oxide film is formed on the first zirconium oxide film by introducing a second reactant including an aluminum precursor, and a second oxidant onto the substrate. The thermally-treated layer including the first zirconium oxide film and the aluminum oxide film may form a dielectric layer of a capacitor.

Abstract: Forming a semiconductor device can include forming an insulating layer on a semiconductor substrate including a conductive region thereof, wherein the insulating layer has a contact hole therein exposing a portion of the conductive region. A polysilicon contact plug can be formed in the contact hole wherein at least a portion of the polysilicon contact plug is doped with an element having a diffusion coeffient that is less than a diffusion coefficient of phosphorus (P). Related structures are also discussed.

Abstract: The present invention provides methods of forming a metal oxide layer and methods of forming a capacitor including the same. The methods of forming the metal oxide include forming a thin layer including a metal oxide, such as zirconium oxide, on a substrate and performing a post-treatment on the thin layer at a temperature at which oxygen present in the metal oxide is hindered from being diffused in the thin layer. Consequently, reduced amounts of byproducts are present on the boundary surface of the thin layer and the substrate thereby improving electrical characteristics of the thin layer.

Abstract: A capacitor of a semiconductor device includes a cylinder type capacitor lower electrode, a dielectric layer, and an upper electrode. The upper electrode includes a metallic layer on the dielectric layer and a doped polySi1-xGex layer stacked on the metallic layer. Methods of forming these capacitors also are provided.

Abstract: In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.

Abstract: A metal-insulator-metal (MIM) capacitor includes a lower electrode, a dielectric layer, and an upper electrode. The lower electrode includes a first conductive layer, a chemical barrier layer on the first conductive layer, and a second conductive layer on the chemical barrier layer. The chemical barrier layer is between the first and second conductive layers and is a different material than the first and second conductive layers. The dielectric layer is on the lower electrode. The upper electrode is on the dielectric layer opposite to the lower electrode. The first and second conductive layers can have the same thickness. The chemical barrier layer can be thinner than each of the first and second conductive layers. Related methods are discussed.