Patents by Inventor Eun-Hye PARK

Eun-Hye PARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160095882
    Abstract: Provided are the tolerogenic dendritic cells for treating a myocardial infarction and a method for preparing the same, and more particularly, the tolerogenic dendritic cells for treating a myocardial infarction, which can treat cardiac insufficiency that occurs by excessive remodeling of left ventricle in the heart muscle recovery process after an acute myocardial infarction, and a method for preparing the tolergenic dendritic cells. According to the present invention, the inflammatory reaction and the excessive remodeling of left ventricle in the heart muscle recovery process after a myocardial infarction can be inhibited, and thus, the incidence rate of cardiac insufficiency can be significantly reduced, thereby being effectively used for treating a myocardial infarction.
    Type: Application
    Filed: October 7, 2014
    Publication date: April 7, 2016
    Inventors: Ki-Yuk Chang, Eun-Ho Choo, Hyo-Eun Park, Eun-Hye Park, Dae-Seog Lim, Jun-Ho Lee
  • Patent number: 9299429
    Abstract: A nonvolatile memory device includes a buffer memory, a read circuit configured to read first data stored in the buffer memory in a first read operation, and a write circuit configured to write second data in the buffer memory in a first write operation, wherein the first write operation is performed when a first internal write command is generated during the first read operation.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: March 29, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Jun Lee, Hoi-Ju Chung, Yong-Jin Kwon, Hyo-Jin Kwon, Eun-Hye Park
  • Patent number: 9287297
    Abstract: A thin film transistor array panel includes: a gate line disposed on a substrate and including a first connection member of a gate driver region and a gate electrode of a display area, a gate insulating layer disposed on the substrate and having a first contact hole exposing the first connection member, a semiconductor layer disposed on a region of the gate insulating layer, a data line disposed on the gate insulating layer and the semiconductor layer and including a drain electrode, a source electrode, and a second connection member connected to the first connection member through the first contact hole, a passivation layer disposed on the data line, the source electrode, the drain electrode, and the second connection member, and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode. A horizontal width of the first contact hole ranges from 1 to 2 ?m.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: March 15, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sho Yeon Kim, Hyun Kim, Eun Hye Park, Byung Hwan Chu, Seung-Ha Choi
  • Publication number: 20160027751
    Abstract: Provided is a semiconductor device having a high-reliability solder joint. The semiconductor device includes a high-temperature solder formed on a conductive pad. A low-temperature solder having a lower melting point than the high-temperature solder is formed on the high-temperature solder. A barrier layer is formed between the high-temperature solder and the low-temperature solder. An Sn content of the high-temperature solder is higher than that of the low-temperature solder.
    Type: Application
    Filed: April 14, 2015
    Publication date: January 28, 2016
    Inventors: Soon-Bum KIM, Tae-Eun KIM, Eun-Hye PARK
  • Publication number: 20150286567
    Abstract: A method for driving a nonvolatile memory device using a resistive element is provided. The method includes storing data in a page buffer, the data including a first data block and a second data block, writing the first data block to a memory cell, performing a verify-read operation on the first data block of the memory cell region, writing the second data block to the memory cell region, and performing a verify-read operation on the second data block of the memory cell region, wherein the first data block and the second data block are smaller than the page buffer in size.
    Type: Application
    Filed: April 7, 2015
    Publication date: October 8, 2015
    Inventors: EUN-HYE PARK, JUN-HO SHIN
  • Patent number: 9135994
    Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: September 15, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jin Kwon, Hoi-Ju Chung, Chae-Hoon Kim, Yong-Jin Kwon, Eun-Hye Park, Yong-Jun Lee
  • Patent number: 9115287
    Abstract: According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: August 25, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon-Taek Jeong, Bo-Sung Kim, Doo-Hyoung Lee, Doo-Na Kim, Eun-Hye Park, Dong-Lim Kim, Hyun-Jae Kim, You-Seung Rim, Hyun-Soo Lim
  • Patent number: 9093146
    Abstract: A nonvolatile memory device comprises a memory core comprising a plurality of variable resistance memory cells, an input/output (I/O) circuit configured to receive a first packet signal and a second packet signal in sequence, the first and second packet signals collectively comprising information for a memory access operation, and further configured to initiate a core access operation upon decoding the first packet signal and to selectively continue or discontinue the core access operation upon decoding the second packet signal, and a read circuit configured to perform part of the core access operation in response to the first packet signal before the second packet signal is decoded.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: July 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Hye Park, Hoi-Ju Chung, Yong-Jin Kwon, Hyo-Jin Kwon, Yong-Jun Lee
  • Publication number: 20150200209
    Abstract: A thin film transistor array panel includes: a gate line disposed on a substrate and including a first connection member of a gate driver region and a gate electrode of a display area, a gate insulating layer disposed on the substrate and having a first contact hole exposing the first connection member, a semiconductor layer disposed on a region of the gate insulating layer, a data line disposed on the gate insulating layer and the semiconductor layer and including a drain electrode, a source electrode, and a second connection member connected to the first connection member through the first contact hole, a passivation layer disposed on the data line, the source electrode, the drain electrode, and the second connection member, and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode. A horizontal width of the first contact hole ranges from 1 to 2 ?m.
    Type: Application
    Filed: September 15, 2014
    Publication date: July 16, 2015
    Inventors: SHO YEON KIM, HYUN KIM, EUN HYE PARK, BYUNG HWAN CHU, SEUNG-HA CHOI
  • Patent number: 9082795
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: July 14, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Chan Woo Yang, Seung-Ho Jung, Doo Na Kim, Bo Sung Kim, Eun Hye Park, June Whan Choi
  • Publication number: 20150003137
    Abstract: A nonvolatile memory device includes a buffer memory, a read circuit configured to read first data stored in the buffer memory in a first read operation, and a write circuit configured to write second data in the buffer memory in a first write operation, wherein the first write operation is performed when a first internal write command is generated during the first read operation.
    Type: Application
    Filed: June 27, 2014
    Publication date: January 1, 2015
    Inventors: Yong-Jun Lee, Hoi-Ju Chung, Yong-Jin Kwon, Hyo-Jin Kwon, Eun-Hye Park
  • Publication number: 20140377904
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Application
    Filed: September 4, 2014
    Publication date: December 25, 2014
    Inventors: DOO HYOUNG LEE, CHAN WOO YANG, SEUNG-HO JUNG, DOO NA KIM, BO SUNG KIM, EUN HYE PARK, JUNE WHAN CHOI
  • Patent number: 8853687
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, ( R , R ? [ mol ? ? % ] = [ In ] [ In + Zn + Sn ] / 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Chan Woo Yang, Seung-Ho Jung, Doo Na Kim, Bo Sung Kim, Eun Hye Park
  • Publication number: 20140247645
    Abstract: A nonvolatile memory device comprises a memory core comprising a plurality of variable resistance memory cells, an input/output (I/O) circuit configured to receive a first packet signal and a second packet signal in sequence, the first and second packet signals collectively comprising information for a memory access operation, and further configured to initiate a core access operation upon decoding the first packet signal and to selectively continue or discontinue the core access operation upon decoding the second packet signal, and a read circuit configured to perform part of the core access operation in response to the first packet signal before the second packet signal is decoded.
    Type: Application
    Filed: February 4, 2014
    Publication date: September 4, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.,
    Inventors: EUN-HYE PARK, HOI-JU CHUNG, YONG-JIN KWON, HYO-JIN KWON, YONG-JUN LEE
  • Publication number: 20140247646
    Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.
    Type: Application
    Filed: February 4, 2014
    Publication date: September 4, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo-Jin KWON, Hoi-Ju CHUNG, Chae-Hoon KIM, Yong-Jin KWON, Eun-Hye PARK, Yong-Jun LEE
  • Publication number: 20140112933
    Abstract: The present invention relates to antibodies against angiopoietins 1 and 2, and derivatives of these antibodies. More specifically, the present invention relates to therapeutic use of the antibodies and fragment thereof which specifically bind to angiopoietins 1 and 2.
    Type: Application
    Filed: April 5, 2011
    Publication date: April 24, 2014
    Applicant: NeoPharm Co. LTD..
    Inventors: Eunkyung Lee, Hyunjung Kang, Minhee Kim, Eun hye Park
  • Publication number: 20130328042
    Abstract: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio (R, R[mol %]=[In]/[In+Zn+Sn]/100) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio (R, R[mol %]=[In]/[In+Zn+Sn]/100) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
    Type: Application
    Filed: November 16, 2012
    Publication date: December 12, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Doo Hyoung LEE, Chan Woo YANG, Seung-Ho JUNG, Doo Na KIM, Bo Sung KIM, Eun Hye PARK, June Whan CHOI
  • Publication number: 20130171779
    Abstract: According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.
    Type: Application
    Filed: November 6, 2012
    Publication date: July 4, 2013
    Applicants: Industry-Academic Cooperation Foundation, Yonsei University, Samsung Display Co., Ltd.
    Inventors: Yeon-Taek JEONG, Bo-Sung KIM, Doo-Hyoung LEE, Doo-Na KIM, Eun-Hye PARK, Dong-Lim KIM, Hyun-Jae KIM, You-Seung RIM, Hyun-Soo LIM