Patents by Inventor Eun Jeong Park
Eun Jeong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250054966Abstract: A positive electrode includes a positive electrode active material, wherein the present invention relates to a positive electrode, in which adhesion between a positive electrode active material layer and a collector is excellent by controlling distribution of a binder in the positive electrode active material layer, and a lithium secondary battery including the same.Type: ApplicationFiled: January 20, 2023Publication date: February 13, 2025Inventors: Geun Sung Lee, Eun Jeong Lee, Sung Eun Park, Ki Hwan Kim, Eui Tae Kim
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Patent number: 12206117Abstract: The present disclosure relates to a method for manufacturing core-shell particles using carbon monoxide, and more particularly, to a method for manufacturing core-shell particles, the method of which a simple and fast one-pot reaction enables particle manufacturing to reduce process costs, facilitate scale-up, change various types of core and shell metals, and form a multi-layered shell by including the steps of adsorbing carbon monoxide on a transition metal for a core, and reacting carbon monoxide adsorbed on the surface of the transition metal for the core, a metal precursor for a shell, and a solvent to form particles with a core-shell structure having a reduced metal shell layer formed on a transition metal core.Type: GrantFiled: September 12, 2023Date of Patent: January 21, 2025Assignee: Korea Institute of Energy ResearchInventors: Gu-gon Park, Eun Jik Lee, Kyunghee Kim, Sung-dae Yim, Seok-hee Park, Min-ji Kim, Young-jun Sohn, Byungchan Bae, Seung-gon Kim, Dongwon Shin, Hwanyeong Oh, Seung Hee Woo, So Jeong Lee, Hyejin Lee, Yoon Young Choi, Won-yong Lee, Tae-hyun Yang
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Patent number: 12040499Abstract: The present invention provides a battery module including: a pair of battery groups in which a plurality of battery cells are stacked; a first heat exchanger disposed between the pair of battery groups to perform heat exchange with first stacked surfaces of the pair of battery groups; and a pair of second heat exchangers disposed outside the pair of battery groups to perform heat exchange with second stacked surfaces which are sides opposite to the first stacked surfaces.Type: GrantFiled: September 28, 2020Date of Patent: July 16, 2024Assignee: SK On Co., Ltd.Inventors: Hae Ryong Jeon, Seok Min Kim, Sun Mo An, Young Sun Choi, Eun Jeong Park
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Publication number: 20220328172Abstract: An optimal transfer hospital determining method and server are provided. Provided is the optimal transfer hospital determining method comprising: determining candidate hospitals; acquiring status information about an emergency patient; determining the severity of the patient on the basis of the acquired status information; calculating emergency event possibility information on the basis of the acquired status information; acquiring transport resources availability information about the determined candidate hospitals; calculating the suitability of each candidate hospital on the basis of the determined severity of the patient, the acquired emergency event possibility information, and the transport resource availability information; and determining the optimal transfer hospital on the basis of the calculated suitability of each candidate hospital.Type: ApplicationFiled: September 3, 2020Publication date: October 13, 2022Applicant: ONTACT HEALTH CO., LTD.Inventors: Hyuk Jae CHANG, Eun Jeong PARK, Ji Min SUNG, Ji Hoon KIM, Min Joung KIM, Sung Woo KIM, Byung Hwan JEON, Seong Min HA, Kyeong Jin ANN
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Publication number: 20210098760Abstract: The present invention provides a battery module including: a pair of battery groups in which a plurality of battery cells are stacked; a first heat exchanger disposed between the pair of battery groups to perform heat exchange with first stacked surfaces of the pair of battery groups; and a pair of second heat exchangers disposed outside the pair of battery groups to perform heat exchange with second stacked surfaces which are sides opposite to the first stacked surfaces.Type: ApplicationFiled: September 28, 2020Publication date: April 1, 2021Inventors: Hae Ryong Jeon, Seok Min Kim, Sun Mo An, Young Sun Choi, Eun Jeong Park
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Patent number: 10153771Abstract: A negative-level shifting circuit includes a first level shifter including an input circuit configured to receive a logic signal having a first voltage level and a load circuit configured to generate a first output signal having a second voltage level based on a voltage generated by the input circuit, and a second level shifter configured to receive the first output signal from the first level shifter and generate a second output signal having a third voltage level. The first level shifter further includes a shielding circuit connected between the input circuit and the load circuit and configured to separate an operating voltage region of the input circuit from an operating voltage region of the load circuit such that the input circuit operates in a positive voltage region and the load circuit operates in a negative voltage region.Type: GrantFiled: October 9, 2015Date of Patent: December 11, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seong-Young Ryu, Yong-Hoan Kim, Eun-Jeong Park
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Publication number: 20160126956Abstract: A negative-level shifting circuit includes a first level shifter including an input circuit configured to receive a logic signal having a first voltage level and a load circuit configured to generate a first output signal having a second voltage level based on a voltage generated by the input circuit, and a second level shifter configured to receive the first output signal from the first level shifter and generate a second output signal having a third voltage level. The first level shifter further includes a shielding circuit connected between the input circuit and the load circuit and configured to separate an operating voltage region of the input circuit from an operating voltage region of the load circuit such that the input circuit operates in a positive voltage region and the load circuit operates in a negative voltage region.Type: ApplicationFiled: October 9, 2015Publication date: May 5, 2016Inventors: Seong-Young Ryu, Yong-Hoan Kim, Eun-Jeong Park
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Publication number: 20150290322Abstract: Disclosed is a sustained-release lipid pre-concentrate, comprising: a) at least one liquid crystal former; b) at least one phospholipid; c) at least one liquid crystal hardener; and d) at least one bi- or multivalent metal salt, wherein the sustained-release pre-concentrate exists as a lipid liquid phase in the absence of aqueous fluid and forms into a liquid crystal upon exposure to aqueous fluid. The sustained-release lipid pre-concentrate is configured to enhance the sustained release of anionic pharmacologically active substances through ionic interaction between the bi- or multivalent metal salt and the anionic pharmacologically active substances.Type: ApplicationFiled: December 27, 2013Publication date: October 15, 2015Inventors: Sang Phil Yoon, Ki Seong Ko, Eun Jeong Park, Sung Joon Hong, So Hyun Park, Min Hyo Ki
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Patent number: 8610184Abstract: A semiconductor integrated circuit device includes: a substrate which has a first conductivity type and in which a first amplifier area and a second amplifier area are defined; a first well which has a second conductivity type, a first pocket well which has the first conductivity type and is separated from the first well, and a first deep well which has the second conductivity type, surrounds the first pocket well, and is separated from the first well; and a second well which has the second conductivity type, a second pocket well which has the first conductivity type and is separated from the second well, and a second deep well which has the second conductivity type, surrounds the second pocket well, and is separated from the second well The first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate.Type: GrantFiled: March 18, 2011Date of Patent: December 17, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hyeon-Cheol Kim, Eun-Jeong Park
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Publication number: 20110278662Abstract: A semiconductor device including a recessed channel transistor, and a method of manufacturing the same, provide: a substrate in which an isolation trench is provided; an isolation layer provided in the isolation trench so as to define a pair of source/drain regions in the substrate; a gate pattern provided in the isolation trench between the pair of source/drain regions, the gate pattern having a top surface at a same level as a top surface of the isolation layer and having a bottom surface at a lower depth than the pair of source/drain regions with respect to a top surface of the substrate; and a gate insulating layer provided between the substrate and the gate pattern at a bottom surface of the isolation trench.Type: ApplicationFiled: April 28, 2011Publication date: November 17, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-il Park, Joon-ho Cho, Tae-cheol Lee, Yong-sang Jeong, Eun-jeong Park, Young-mok Kim, Seok-ju Lee
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Publication number: 20110260798Abstract: A semiconductor integrated circuit device includes: a substrate which has a first conductivity type and in which a first amplifier area and a second amplifier area are defined; a first well which has a second conductivity type, a first pocket well which has the first conductivity type and is separated from the first well, and a first deep well which has the second conductivity type, surrounds the first pocket well, and is separated from the first well; and a second well which has the second conductivity type, a second pocket well which has the first conductivity type and is separated from the second well, and a second deep well which has the second conductivity type, surrounds the second pocket well, and is separated from the second well The first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate.Type: ApplicationFiled: March 18, 2011Publication date: October 27, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyeon-Cheol Kim, Eun-Jeong Park
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Patent number: 7722887Abstract: The present invention relates to detoxified and immunologically active proteins (“mutant LTs”) having mutated amino acid sequences of heat-labile enterotoxin of E. coli, DNA sequences encoding the mutant LTs, recombinant expression vectors comprising the DNAs, recombinant microorganisms transformed with the recombinant expression vectors, process for preparing the mutant LTs and pharmaceutical application of the said protein as immunogenic antigens for vaccination and as adjuvants for anti-body production. In contrast to wild-type LT, the mutant LTs did not induce any toxic activities. The mutant LTs elicited high and comparable levels of anti-LT antibodies when delivered either intragastrically or intranasally, inducing systemic and local responses in serum and fecal extracts. Thus, they might be useful for the development of a novel diarrheal vaccine in humans and animals.Type: GrantFiled: September 15, 1999Date of Patent: May 25, 2010Assignee: Mogam Biotechnology Research InstituteInventors: Eun Jeong Park, Jang Seong Kim, Jihoon Chang, Jungsun Yum, Soo-il Chung
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Patent number: 7118905Abstract: The present invention provides a novel angiogenesis inhibitor, LK68 whose amino acid sequence is identical with the human apolipoprotein (a) kringle domains IV36, IV37 and V38, a cDNA sequence encoding the LK68, a recombinant expression vector comprising the cDNA, a recombinant microorganism transformed with the recombinant expression vector and a novel use of the LK68 as an anticancer agent and a method for treating angiogenesis-mediated disease. LK68, LK6, LK7 and LK8 exhibit inhibitory activities on the cultured endothelial cell proliferation as well as on the endothelial cell migration. LK68 and its single kringles also inhibit the normal development of capillaries in the chick embryo chorioallantoic membrane (CAM). It was also showed that systemic administration of LK68 causes the inhibition of primary tumor growth, which is correlated with a suppression of tumor-induced angiogenesis.Type: GrantFiled: May 19, 2004Date of Patent: October 10, 2006Assignee: Mogam Biotechnology Research InstituteInventors: Jihoon Chang, Jang Seong Kim, Eun Jeong Park, Jung-sun Yum, Soo-il Chung
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Publication number: 20040259202Abstract: The present invention provides a novel angiogenesis inhibitor, LK68 whose amino acid sequence is identical with the human apolipoprotein (a) kringle domains IV36, IV37 and V38, a cDNA sequence encoding the LK68, a recombinant expression vector comprising the cDNA, a recombinant microorganism transformed with the recombinant expression vector and a novel use of the LK68 as an anticancer agent and a method for treating angiogenesis-mediated disease. LK68, LK6, LK7 and LK8 exhibit inhibitory activities on the cultured endothelial cell proliferation as well as on the endothelial cell migration. LK68 and its single kringles also inhibit the normal development of capillaries in the chick embryo chorioallantoic membrane (CAM). It was also showed that systemic administration of LK68 causes the inhibition of primary tumor growth, which is correlated with a suppression of tumor-induced angiogenesis.Type: ApplicationFiled: May 19, 2004Publication date: December 23, 2004Inventors: Jihoon Chang, Jang Seong Kim, Eun Jeong Park, Jung-sun Yum, Soo-il Chung
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Patent number: 6768159Abstract: A semiconductor device in which polysilicon is used to form source and drain regions in an initial process step so as to reduce resistance of bit lines and minimize a junction capacitance and thus improve its reliability, and a method for fabricating the same are disclosed, the semiconductor device including a semiconductor substrate, trenches formed in predetermined areas of the semiconductor substrate, an insulating layer formed in the trenches and beneath a surface of the substrate to have a recess, a polysilicon layer formed on the insulating layer in the trench, source and drain regions formed at both sides of the polysilicon layer beneath a surface of the semiconductor substrate, and gates formed over the semiconductor substrate.Type: GrantFiled: October 31, 2002Date of Patent: July 27, 2004Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Eun Jeong Park, Sung Chul Lee
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Patent number: 6743428Abstract: The present invention provides a novel angiogenesis inhibitor, LK68 whose amino acid sequence is identical with the human apolipoprotein (a) kringle domains IV36, IV37 and V38, a cDNA sequence encoding the LK68, a recombinant expression vector comprising the cDNA, a recombinant microorganism transformed with the recombinant expression vector and a novel use of the LK68 as an anticancer agent and a method for treating angiogenesis-mediated disease. LK68, LK6, LK7 and LK8 exhibit inhibitory activities on the cultured endothelial cell proliferation as well as on the endothelial cell migration. LK68 and its single kringles also inhibit the normal development of capillaries in the chick embryo chorioallantoic membrane (CAM). It was also showed that systemic administration of LK68 causes the inhibition of primary tumor growth, which is correlated with a suppression of tumor-induced angiogenesis.Type: GrantFiled: March 15, 2002Date of Patent: June 1, 2004Assignee: Mogam Biotechnology Research InstituteInventors: Jihoon Chang, Jang Seong Kim, Eun Jeong Park, Jung-sun Yum, Soo-Il Chung
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Publication number: 20030052362Abstract: A semiconductor device in which polysilicon is used to form source and drain regions in an initial process step so as to reduce resistance of bit lines and minimize a junction capacitance and thus improve its reliability, and a method for fabricating the same are disclosed, the semiconductor device including a semiconductor substrate, trenches formed in predetermined areas of the semiconductor substrate, an insulating layer formed in the trenches and beneath a surface of the substrate to have a recess, a polysilicon layer formed on the insulating layer in the trench, source and drain regions formed at both sides of the polysilicon layer beneath a surface of the semiconductor substrate, and gates formed over the semiconductor substrate.Type: ApplicationFiled: October 31, 2002Publication date: March 20, 2003Applicant: Hyundai Electronics Industries Co., Ltd.Inventors: Eun Jeong Park, Sung Chul Lee
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Patent number: 6528840Abstract: A semiconductor device in which polysilicon is used to form source and drain regions in an initial process step so as to reduce resistance of bit lines and minimize a junction capacitance and thus improve its reliability, and a method for fabricating the same are disclosed, the semiconductor device including a semiconductor substrate, trenches formed in predetermined areas of the semiconductor substrate, an insulating layer formed in the trenches and beneath a surface of the substrate to have a recess, a polysilicon layer formed on the insulating layer in the trench, source and drain regions formed at both sides of the polysilicon layer beneath a surface of the semiconductor substrate, and gates formed over the semiconductor substrate.Type: GrantFiled: June 4, 2001Date of Patent: March 4, 2003Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Eun Jeong Park, Sung Chul Lee
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Patent number: 6271091Abstract: A method of fabricating a flash memory cell includes the steps of forming a field insulating layer on a substrate, forming a first gate oxide layer on the substrate, forming a floating gate, a first insulating layer and a control gate on the first gate oxide layer, forming sidewall insulating layers at both sides of the floating gate and the control gate, forming sidewall conductive layers on the sidewall insulating layers, and forming a source and drain region in the substrate.Type: GrantFiled: November 9, 1998Date of Patent: August 7, 2001Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Eun-Jeong Park
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Patent number: 6261902Abstract: A semiconductor device in which polysilicon is used to form source and drain regions in an initial process step so as to reduce resistance of bit lines and minimize a junction capacitance and thus improve its reliability, and a method for fabricating the same are disclosed, the semiconductor device including a semiconductor substrate, trenches formed in predetermined areas of the semiconductor substrate, an insualting layer formed in the trenches and beneath a surface of the substrate to have a recess, a polysilicon layer formed on the insualting layer in the trench, source and drain regions formed at both sides of the polysilicon layer beneath a surface of the semiconductor substrate, and gates formed over the semiconductor substrate.Type: GrantFiled: September 8, 1997Date of Patent: July 17, 2001Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Eun Jeong Park, Sung Chul Lee