Patents by Inventor Eun Kyung Baek

Eun Kyung Baek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070004139
    Abstract: In a method of manufacturing a non-volatile semiconductor device, a mask structure is formed on a substrate. A trench is formed by partially etching the substrate using the mask structure. A preliminary isolation layer pattern is formed on the substrate to fill the trench. The preliminary isolation layer has an upper face lower than that of the mask structure. A capping layer pattern is formed on the preliminary isolation layer pattern. An opening and an isolation layer pattern are formed by removing the mask structure and a portion on a sidewall of the preliminary isolation layer pattern adjacent to the mask structure. After forming a tunnel oxide layer, a floating gate is formed on the tunnel oxide layer and a sidewall of the isolation layer pattern.
    Type: Application
    Filed: June 26, 2006
    Publication date: January 4, 2007
    Inventors: Hong-Gun Kim, Kyu-Tae Na, Eun-Kyung Baek, Ju-Seon Goo, Sang-Ho Rha
  • Publication number: 20060102940
    Abstract: The present invention is directed to a semiconductor device having a photodetector and a method of fabricating the same. The photodetector includes a visible ray absorbing pattern disposed on a top and/or bottom surface of an interconnection formed at a light shielding area between adjacent photodetectors, which prevents obliquely incident light from reaching an adjacent photodetector.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 18, 2006
    Inventors: Yong-Won Cha, Eun-Kyung Baek, Kyu-Tae Na
  • Publication number: 20060068599
    Abstract: The present invention can provide methods of forming a thin layer for a semiconductor device. The methods can include forming a recessed portion on an object, and forming an insulation layer on the object by reacting a water vapor, an oxygen gas including an oxygen radical and an organic silicon source gas with each other, so that the recessed portion is filled with the insulation layer. Accordingly, a flow characteristic of the insulation layer can be improved, so that a seam defect can be sufficiently decreased in the insulation layer. The present invention can further provide apparatus for forming a thin layer.
    Type: Application
    Filed: September 6, 2005
    Publication date: March 30, 2006
    Inventors: Eun-Kyung Baek, Kyu-Tae Na, Sang-Ho Rha
  • Publication number: 20040169283
    Abstract: An integrated circuit device includes a substrate that has a pair of conductive structures disposed thereon. An insulating interlayer is on the substrate between the pair of conductive structures. The insulating interlayer includes a carbon-containing silicon oxide layer on the substrate and a silicon oxide layer on the carbon-containing silicon oxide layer.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 2, 2004
    Inventors: Eun-Kyung Baek, Kyu-Tae Na, Joon-Sang Park
  • Patent number: 6774048
    Abstract: A method of manufacturing a semiconductor device includes forming a silicon nitride layer on a semiconductor substrate on which a predetermined pattern is formed. The silicon nitride layer includes a plurality of bonds formed between silicon and nitrogen. A portion of the bonds formed between silicon and nitrogen is broken to form at least one free bonding site on a surface of the silicon nitride layer. A silane compound and a flow fill method are used to form a silicon oxide layer on the silicon nitride layer.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: August 10, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Kyung Baek, Sun-Hoo Park, Hong-Gun Kim, Kyung-Joong Yoon
  • Publication number: 20030224617
    Abstract: A method of manufacturing a semiconductor device includes forming a silicon nitride layer on a semiconductor substrate on which a predetermined pattern is formed. The silicon nitride layer includes a plurality of bonds formed between silicon and nitrogen. A portion of the bonds formed between silicon and nitrogen is broken to form at least one free bonding site on a surface of the silicon nitride layer. A silane compound and a flow fill method are used to form a silicon oxide layer on the silicon nitride layer.
    Type: Application
    Filed: January 17, 2003
    Publication date: December 4, 2003
    Inventors: Eun-Kyung Baek, Sun-Hoo Park, Hong-Gun Kim, Kyung-Joong Yoon