Patents by Inventor Eun-Soo Jeong

Eun-Soo Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080305637
    Abstract: A method for forming a fine pattern of a semiconductor device which includes sequentially forming a non-etching layer and a sacrificial layer on a semiconductor substrate; and then forming a plurality of photo-resist layer patterns having a plurality of openings exposing the sacrificial layer; and then forming a plurality of first pattern grooves in the sacrificial layer etching the exposed sacrificial layer using the photo-resist patterns as an etching barrier; removing the photo-resist layer; and then forming an oxidation layer having a plurality of second pattern grooves on the sacrificial layer and in the first pattern grooves by performing a thermal oxidation process on the sacrificial layer; and then forming a plurality of first through-holes exposing the non-etching layer by completely removing the sacrificial layer remaining in oxidation layer; and then forming a plurality of patterns in the non-etching layer by etching the exposed portions of the non-etching layer using the oxidation layer as an etch
    Type: Application
    Filed: May 6, 2008
    Publication date: December 11, 2008
    Inventor: Eun-Soo Jeong
  • Publication number: 20080286973
    Abstract: A method for forming a fine-pitch pattern on a semiconductor substrate is provided. The method includes patterning the semiconductor substrate to form a plurality of fine lines, forming a thermal oxide layer on the fine lines, polishing the thermal oxide layer to expose a top surface of the fine lines; etching the fine lines using the thermal oxide layer as a mask to expose first portions of the semiconductor substrate, etching a central bottom portion of the thermal oxide layer to expose second portions of the semiconductor substrate, and etching the semiconductor substrate using the etched thermal oxide layer as a mask.
    Type: Application
    Filed: May 16, 2008
    Publication date: November 20, 2008
    Inventor: Eun Soo JEONG
  • Publication number: 20080157245
    Abstract: A method of manufacturing an image sensor having a minimized spatial distance between microlenses to improve integration, and thus, enhance the ability of each microlens to condense light incident.
    Type: Application
    Filed: December 17, 2007
    Publication date: July 3, 2008
    Inventor: Eun-Soo Jeong
  • Publication number: 20080153287
    Abstract: A method for patterning a semiconductor device can include forming a conductive layer over a semiconductor substrate; alternatively forming positive photoresists and negative photoresists over the conductive layer; forming a plurality of first conductive lines by selectively removing a portion of the conductive layer using the positive photoresist and the negative photoresist as masks; forming an oxide film over the semiconductor substrate including the first conductive lines and the conductive layer; performing a planarization process over the oxide film using the uppermost surface of the first conductive line as a target; removing the plurality of first conductive lines using the oxide film as a mask; forming a plurality if trenches in the semiconductor substrate and removing a portion of the oxide film to expose the uppermost surface of the conductive layer; and then forming a plurality of second conductive lines by removing the exposed conductive layer using the oxide film as a mask.
    Type: Application
    Filed: November 26, 2007
    Publication date: June 26, 2008
    Inventor: Eun-Soo Jeong
  • Publication number: 20080048336
    Abstract: A semiconductor device and method for manufacturing the same are provided, capable of narrowing feature size by utilizing the property of oxidation of a material. In one method, a polysilicon layer can be patterned into a fine pattern up to a critical dimension using a photolithography process. Then the patterned polysilicon layer can be oxidized, thereby narrowing the gap between adjacent polysilicon patterns and narrowing the polysilicon patterns through the oxidation process. The narrowed polysilicon patterns and/or the narrowed gap between adjacent polysilicon patterns can be used to form vias or trenches in the substrate (or layer) below the polysilicon layer having a width narrower than the critical dimension.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 28, 2008
    Inventor: EUN SOO JEONG
  • Publication number: 20080020543
    Abstract: A manufacturing method of a semiconductor device according to an embodiment includes: forming a trench for a device isolation area and a semiconductor projection with a first width by etching a semiconductor substrate; forming an oxide film on the trench and the semiconductor projections; forming an insulating layer on the oxide film; exposing the upper surface of the semiconductor projection by polishing the insulating layer and the oxide film; forming a gate insulating layer at a lower region of the semiconductor projection; and etching the insulating layer and the oxide film on the substrate.
    Type: Application
    Filed: July 18, 2007
    Publication date: January 24, 2008
    Inventors: EUN SOO JEONG, JEA HEE KIM
  • Publication number: 20080020569
    Abstract: Provided is a method for manufacturing a semiconductor device. In the method, photoresist patterns having a first width are formed on a semiconductor substrate, and the semiconductor substrate is etched using the photoresist patterns as a mask to form a semiconductor protrusion portion. An oxide layer is formed on an entire surface of the semiconductor substrate including the semiconductor protrusion portion. Subsequently, the semiconductor protrusion portion is removed to form a trench surrounded by the oxide layer. After that, blanket-etching is performed on the trench to leave only a portion of the oxide layer formed around the trench. Metal is deposited on an entire surface of the semiconductor substrate including the oxide layer, and the oxide layer is removed to form a metal line.
    Type: Application
    Filed: July 18, 2007
    Publication date: January 24, 2008
    Inventor: Eun Soo Jeong