Patents by Inventor Eunkee Hong

Eunkee Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7332409
    Abstract: A method of forming a trench isolation layer can include forming an isolation layer in a trench using High Density Plasma Chemical Vapor Deposition (HDPCVD) with a carrier gas comprising hydrogen. Other methods are disclosed.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Kyu-Tae Na, Yong-Soon Choi, Eunkee Hong, Ju-Seon Goo
  • Publication number: 20060094243
    Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.
    Type: Application
    Filed: December 9, 2005
    Publication date: May 4, 2006
    Inventors: Eunkee Hong, Kyutae Na, Juseon Goo, Hong Kim
  • Publication number: 20060094203
    Abstract: In a method of forming a device isolation layer for minimizing a parasitic capacitor and a non-volatile memory device using the same, a trench is formed on a substrate. A first insulation layer is formed on a top surface of the substrate and on inner surfaces of the trench, so that the trench is partially filled with the first insulation layer. A second insulation layer is formed on the first insulation layer to a thickness to fill up the trench, thereby forming a preliminary isolation layer. An etching rate of the second insulation layer is different from that of the first insulation layer. A recess is formed at a central portion of the preliminary isolation layer by partially removing the first and second insulation layers, thereby forming the device isolation layer including the recess. The recess in the device isolation layer reduces a parasitic capacitance in a non-volatile memory device.
    Type: Application
    Filed: November 4, 2005
    Publication date: May 4, 2006
    Inventors: Jong-Wan Choi, Hong-Gun Kim, Kyu-Tae Na, Eunkee Hong
  • Publication number: 20060089008
    Abstract: Methods of manufacturing silicon oxide layers for semiconductor devices are provided in which a substrate having a recess is coated with a spin-on-glass film so that the recess is filled with the spin-on-glass film. A main thermal treatment is performed on the spin-on-glass film at about 600 to about 1,000° C. at about 1 ATM to about 50 ATM so that the spin-on-glass film is converted into a relatively dense silicon oxide layer.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 27, 2006
    Inventors: Eunkee Hong, Ju-Seon Goo, Kyu-Tae Na, Sang-Ho Rha
  • Patent number: 7015144
    Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: March 21, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eunkee Hong, Kyutae Na, Juseon Goo, Hong Gun Kim
  • Publication number: 20060054989
    Abstract: A semiconductor device includes a first structure having a recess having a bottom and opposing side surfaces, and a second structure conformally disposed on the bottom and side surfaces of the recess. The second structure includes a multilayer having two layers having a thickness substantially smaller than a width of the recess. Methods of manufacturing a semiconductor device include providing a first structure having a recess in a deposition chamber and flowing first and second reactants over the first structure for a first period at first and second flow rates. Then, the flow rates of the first second reactants to the first structure are substantially reduced for a pause period. The first and second reactants are then flowed over the first structure for a second period at third and fourth flow rates. The deposition and pause steps may be repeated until a multilayer having a desired thickness is formed.
    Type: Application
    Filed: August 23, 2005
    Publication date: March 16, 2006
    Inventors: Hong-Gun Kim, Eunkee Hong, Kyu-Tae Na
  • Publication number: 20050277265
    Abstract: A method of forming a trench isolation layer can include forming an isolation layer in a trench using High Density Plasma Chemical Vapor Deposition (HDPCVD) with a carrier gas comprising hydrogen. Other methods are disclosed.
    Type: Application
    Filed: June 9, 2005
    Publication date: December 15, 2005
    Inventors: Yong-Won Cha, Kyu-Tae Na, Yong-Soon Choi, Eunkee Hong, Ju-Seon Goo
  • Publication number: 20050130439
    Abstract: Methods of forming an insulating layer in a semiconductor device are provided in which a metal oxide layer is formed on a semiconductor structure that includes a plurality of gap regions thereon. A spin-on-glass layer is formed on the metal oxide layer, and then the semiconductor structure is heated to a temperature of at least about 400° C. The spin-on-glass layer may comprise a siloxane-based material, a silanol-based material or a silazane-based material.
    Type: Application
    Filed: December 10, 2004
    Publication date: June 16, 2005
    Inventors: Juseon Goo, Eunkee Hong, Hong-Gun Kim, Kyu-Tae Na
  • Publication number: 20040161944
    Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 19, 2004
    Inventors: Eunkee Hong, Kyutae Na, Juseon Goo, Hong Gun Kim