Patents by Inventor Evelyne Gridelet

Evelyne Gridelet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10043894
    Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: August 7, 2018
    Assignee: NXP B.V.
    Inventors: Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Jan Willem Slotboom, Dirk Klaassen
  • Patent number: 10014398
    Abstract: The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: July 3, 2018
    Assignee: NXP B.V.
    Inventors: Johannes Donkers, Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Dirk Klaassen
  • Patent number: 9799757
    Abstract: A sensor device (100, 2800) for detecting particles, the sensor device (100, 2800) comprising a substrate (102), a first doped region (104) formed in the substrate (102) by a first dopant of a first type of conductivity, a second doped region (106, 150) formed in the substrate (102) by a second dopant of a second type of conductivity which differs from the first type of conductivity, a depletion region (108) at a junction between the first doped region (104) and the second doped region (106, 150), a sensor active region (110) adapted to influence a property of the depletion region (108) in the presence of the particles, and a detection unit (112) adapted to detect the particles based on an electric measurement performed upon application of a predetermined reference voltage between the first doped region (104) and the second doped region (106, 150), the electric measurement being indicative of the presence of the particles in the sensor active region (110).
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: October 24, 2017
    Assignee: NXP B.V.
    Inventors: Evelyne Gridelet, Almudena Huerta, Pierre Goarin, Jan Sonsky
  • Publication number: 20170229564
    Abstract: The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.
    Type: Application
    Filed: April 24, 2017
    Publication date: August 10, 2017
    Inventors: Johannes Donkers, Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Dirk Klaassen
  • Patent number: 9515644
    Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: December 6, 2016
    Assignee: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Antonius Maria Hurxk, Tony Vanhoucke, Jan Willem Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
  • Patent number: 9431524
    Abstract: Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate (10) comprising a pair of first isolation regions (12) separated from each other by an active region (11) comprising a collector impurity said bipolar transistor; forming a base layer stack (14, 14?) over said substrate; forming a further stack of a migration layer (15) having a first migration temperature and an etch stop layer (20) over said base layer stack (14); forming a base contact layer (16) having a second migration temperature over the further stack, the second migration temperature being higher than the first migration temperature; etching an emitter window (28) in the base contact layer over the active region, said etching step terminating at the etch stop layer; at least partially removing the etch stop layer, thereby forming cavities (29) extending from the emitter window in between the base contact layer and the redistribution layer; and exposing the resultan
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 30, 2016
    Assignee: NXP B.V.
    Inventors: Johannes Josephus Theodorus Marinus Donkers, Petrus Hubertus Cornelis Magnee, Blandine Duriez, Evelyne Gridelet, Hans Mertens, Tony Vanhoucke
  • Patent number: 9375711
    Abstract: “Click-assembly” methods of assembling a sensor for sensing biologically-active molecules by measuring impedance changes, are disclosed, comprising supporting a bio-sensor on a carrier, the bio-sensor comprising an electronic component having at least one micro-electrode and at least one electrical contact, functionalizing the bio-sensor by physically or chemically coupling a bio-receptor molecule to each of the at least one micro-electrode, and subsequently assembling the bio-sensor with a micro-fluidic unit by means of a clamp which clamps the bio-sensor with the micro-fluidic unit, such that in use a fluid introduced into the micro-fluidic unit is able to contact the bio-receptor and is isolated from the electrical contact. The clamp may be a spring, and the method may avoid a requirement for sealing by chemical or thermal means and thereby avoid damaging the bio-receptor. Sensors which can be assembled according to such methods are also disclosed.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: June 28, 2016
    Assignee: NXP B.V.
    Inventors: Romano Hoofman, Gerard Reuvers, Franciscus Petrus Widdershoven, Evelyne Gridelet, Marcus Henricus van Kleef
  • Patent number: 9269706
    Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: February 23, 2016
    Assignee: NXP, B.V.
    Inventors: Evelyne Gridelet, Hans Mertens, Michiel Jos van Duuren, Tony Vanhoucke, Viet Thanh Dinh
  • Patent number: 9240468
    Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: January 19, 2016
    Assignee: NXP, B.V.
    Inventors: Tony Vanhoucke, Viet Thanh Dinh, Anco Heringa, Dirk Klaassen, Evelyne Gridelet, Jan Willem Slotboom
  • Patent number: 9206794
    Abstract: A microfluidic pump comprises a plurality of metal electrodes (10) which oxidise in air, a liquid droplet (14) to be moved by the pump, which is in contact with a least one metal electrode, and a controller for controlling the oxidation state of the metal electrodes in order to vary the electrode wettability. This arrangement enables full integration with a semiconductor device, and with low drive voltages.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 8, 2015
    Assignee: NXP, B.V.
    Inventor: Evelyne Gridelet
  • Patent number: 9177852
    Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: November 3, 2015
    Assignee: NXP B.V.
    Inventors: Peter Gerard Steeneken, Roel Daamen, Gerard Koops, Jan Sonsky, Evelyne Gridelet, Coenraad Cornelis Tak
  • Publication number: 20150263108
    Abstract: The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 17, 2015
    Inventors: Johannes Donkers, Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Dirk Klaassen
  • Patent number: 9111987
    Abstract: Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: August 18, 2015
    Assignee: NXP, B.V.
    Inventors: Evelyne Gridelet, Johannes Donkers, Petrus Hubertus Cornelis Magnee, Viet Dinh, Tony Vanhoucke
  • Publication number: 20150145005
    Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region) of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 28, 2015
    Inventors: Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Jan Willem Slotboom, Dirk Klaassen
  • Patent number: 9018681
    Abstract: Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: April 28, 2015
    Assignee: NXP B.V.
    Inventors: Evelyne Gridelet, Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez
  • Publication number: 20150041862
    Abstract: Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate (10) comprising a pair of first isolation regions (12) separated from each other by an active region (11) comprising a collector impurity said bipolar transistor; forming a base layer stack (14, 14?) over said substrate; forming a further stack of a migration layer (15) having a first migration temperature and an etch stop layer (20) over said base layer stack (14); forming a base contact layer (16) having a second migration temperature over the further stack, the second migration temperature being higher than the first migration temperature; etching an emitter window (28) in the base contact layer over the active region, said etching step terminating at the etch stop layer; at least partially removing the etch stop layer, thereby forming cavities (29) extending from the emitter window in between the base contact layer and the redistribution layer; and exposing the resultan
    Type: Application
    Filed: October 27, 2014
    Publication date: February 12, 2015
    Applicant: NXP B.V.
    Inventors: Johannes Josephus Theodorus Marinus DONKERS, Petrus Hubertus Cornelis MAGNEE, Blandine DURIEZ, Evelyne GRIDELET, Hans MERTENS, Tony VANHOUCKE
  • Patent number: 8946042
    Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14?), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: February 3, 2015
    Assignee: NXP, B.V.
    Inventors: Evelyne Gridelet, Johannes Josephus Theodorus Marinus Donkers, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee, Hans Mertens, Blandine Duriez
  • Patent number: 8901669
    Abstract: A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: December 2, 2014
    Assignee: NXP, B.V.
    Inventors: Hans Mertens, Johannes Theodorus Marinus Donkers, Evelyne Gridelet, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee
  • Publication number: 20140347135
    Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Adrianus Maria Hurxk, Tony Vanhoucke, Jan Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
  • Publication number: 20140347131
    Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Antonius Maria Hurxk, Tony Vanhoucke, Jan Willem Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet