Patents by Inventor Evelyne Gridelet
Evelyne Gridelet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140342527Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.Type: ApplicationFiled: August 1, 2014Publication date: November 20, 2014Inventors: Peter Gerard STEENEKEN, Roel DAAMEN, Gerard KOOPS, Jan SONSKY, Evelyne GRIDELET, Coenraad Cornelis TAK
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Publication number: 20140327110Abstract: Consistent with an example embodiment, a bipolar transistor comprises an emitter region vertically separated from a collector region in a substrate by a base region. The bipolar transistor further comprises a field plate electrically connected to the emitter region; the field plate extends from the emitter region along the base region into the collector region and the field plate is laterally electrically insulated from the base region and the collector region by a spacer. The spacer comprises an electrically isolating material that includes a silicon nitride layer and is vertically electrically isolated from the substrate by a further electrically isolating material.Type: ApplicationFiled: April 23, 2014Publication date: November 6, 2014Applicant: NXP B.V.Inventors: Evelyne Gridelet, Johannes Donkers, Petrus Hubertus Cornelis Magnee, Viet Dinh, Tony Vanhoucke
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Patent number: 8871599Abstract: Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.Type: GrantFiled: August 30, 2012Date of Patent: October 28, 2014Assignee: NXP, B.V.Inventors: Johannes Josephus Theodorus Marinus Donkers, Petrus Hubertus Cornelis Magnee, Blandine Duriez, Evelyne Gridelet, Hans Mertens, Tony Vanhoucke
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Patent number: 8872237Abstract: Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.Type: GrantFiled: November 18, 2011Date of Patent: October 28, 2014Assignee: NXP, B.V.Inventors: Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez, Evelyne Gridelet
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Publication number: 20140312356Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.Type: ApplicationFiled: March 24, 2014Publication date: October 23, 2014Applicant: NXP B.V.Inventors: Tony Vanhoucke, Viet Thanh Dinh, Anco Heringa, Dirk Claasen, Evelyne Gridelet, Jan Willem Slotboom
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Patent number: 8853816Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.Type: GrantFiled: December 5, 2012Date of Patent: October 7, 2014Assignee: NXP B.V.Inventors: Peter Gerard Steeneken, Roel Daamen, Gerard Koops, Jan Sonsky, Evelyne Gridelet, Coenraad Cornelis Tak
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Patent number: 8821794Abstract: A sensor chip (100) for detecting particles, the sensor chip (100) comprising a substrate (102), an electric connection structure (104) arranged in a surface portion of the substrate (102) and adapted for an electric connection to an electric connection element (106), a sensor active region (108) arranged in another surface portion of the substrate (102) and being sensitive to the presence of the particles to be detected, and a continuous dielectric layer (110) covering the substrate (102) including covering the electric connection structure (104) and the sensor active region (108).Type: GrantFiled: March 19, 2009Date of Patent: September 2, 2014Assignee: NXP, B.V.Inventors: Evelyne Gridelet, Franciscus Widdershoven, Pablo Garcia Tello, Magali Lambert
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Patent number: 8794054Abstract: A sensor device for analyzing fluidic samples is provided. The sensor device includes a stacked sensing arrangement having at least three sensing layers and a multilayer structure. The multilayer structure has a hole formed therein which is adapted to let pass the fluidic sample and the stacked sensing arrangement is formed in the multilayer structure in such a way that the fluidic sample passes the stacked sensing arrangement when the fluidic sample passes the hole.Type: GrantFiled: March 25, 2010Date of Patent: August 5, 2014Assignee: NXP, B.V.Inventors: Evelyne Gridelet, Pablo Garcia Tello, Michiel Jos Van Duuren, Nader Akil
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Publication number: 20140167055Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.Type: ApplicationFiled: December 6, 2013Publication date: June 19, 2014Applicant: NXP B.V.Inventors: Evelyne Gridelet, Hans Mertens, Michiel Jos van Duuren, Tony Vanhoucke, Viet Thanh Dinh
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Publication number: 20140162426Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14?), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.Type: ApplicationFiled: February 11, 2014Publication date: June 12, 2014Applicant: NXP B.V.Inventors: Evelyne Gridelet, Johannes Josephus Theodorus Marinus Donkers, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee, Hans Mertens, Blandine Duriez
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Publication number: 20140151844Abstract: An isolated semiconductor circuit comprising: a first sub-circuit and a second sub-circuit; a backend that includes an electrically isolating connector between the first and second sub-circuits; a lateral isolating trench between the semiconductor portions of the first and second sub-circuits, wherein the lateral isolating trench extends along the width of the semiconductor portions of the first and second sub-circuits, wherein one end of the isolating trench is adjacent the backend, and wherein the isolating trench is filled with an electrically isolating material.Type: ApplicationFiled: December 5, 2012Publication date: June 5, 2014Applicant: NXP B.V.Inventors: Peter Gerard STEENEKEN, Roel DAAMEN, Gerard KOOPS, Jan SONSKY, Evelyne GRIDELET, Coenraad Cornelis TAK
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Patent number: 8686424Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14?), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.Type: GrantFiled: September 14, 2012Date of Patent: April 1, 2014Assignee: NXP, B.V.Inventors: Evelyne Gridelet, Johannes Josephus Theodorus Marinus Donkers, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee, Hans Mertens, Blandine Duriez
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Publication number: 20130087799Abstract: Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14?), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.Type: ApplicationFiled: September 14, 2012Publication date: April 11, 2013Applicant: NXP B.V.Inventors: Evelyne GRIDELET, Johannes Josephus Theodorus Marinus DONKERS, Tony VANHOUCKE, Petrus Hubertus Cornelis MAGNEE, Hans MERTENS, Blandine DURIEZ
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Publication number: 20130056855Abstract: Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.Type: ApplicationFiled: August 30, 2012Publication date: March 7, 2013Applicant: NXP B.V.Inventors: Johannes Josephus Theodorus Marinus DONKERS, Petrus Hubertus Cornelis MAGNEE, Blandine DURIEZ, Evelyne GRIDELET, Hans MERTENS, Tony VANHOUCKE
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Publication number: 20130032891Abstract: A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.Type: ApplicationFiled: July 27, 2012Publication date: February 7, 2013Applicant: NXP B.V.Inventors: Hans Mertens, Johannes Theodorus Marinus Donkers, Evelyne Gridelet, Tony Vanhoucke, Petrus Hubertus Cornelis Magnee
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Publication number: 20120238473Abstract: A sensor device is disclosed, which depends on discrimination in time between groups of binding events of target particles to nano-electrodes. The target particles may be in the liquid phase or in suspension. The nano-electrodes form part of a sensor arrangement having a plurality of sensors. The sensor device is arranged such that different species of target particles arrive at the nano-electrodes at different times, using techniques such as chromatography or application of a field such as an electric, magnetic, or gravitational field. The particles may be labelled or unlabeled. The invention is particularly suited, but not limited, to sensing bioparticles.Type: ApplicationFiled: March 14, 2012Publication date: September 20, 2012Applicant: NXP B.V.Inventors: Evelyne Gridelet, Hilco Suy, Filip Frederix
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Publication number: 20120132961Abstract: Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.Type: ApplicationFiled: November 18, 2011Publication date: May 31, 2012Applicant: NXP B.V.Inventors: Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez, Evelyne Gridelet
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Publication number: 20120132999Abstract: Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method.Type: ApplicationFiled: November 22, 2011Publication date: May 31, 2012Applicant: NXP B.V.Inventors: Evelyne Gridelet, Tony Vanhoucke, Johannes Josephus Theodorus Marinus Donkers, Hans Mertens, Blandine Duriez
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Publication number: 20120060589Abstract: A sensor device for analyzing fluidic samples is provided, wherein the sensor device comprises a stacked sensing arrangement comprising at least three sensing layers and a multilayer structure, wherein the multilayer structure has a hole formed therein which is adapted to let pass the fluidic sample and wherein the stacked sensing arrangement is formed in the multilayer structure in such a way that the fluidic sample passes the stacked sensing arrangement when the fluidic sample passes the hole.Type: ApplicationFiled: March 25, 2010Publication date: March 15, 2012Applicant: NXP B.V.Inventors: Evelyne Gridelet, Pablo Garcia Tello, Michiel Jos Van Duuren, Nader Akil
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Publication number: 20110217206Abstract: “Click-assembly” methods of assembling a sensor for sensing biologically-active molecules by measuring impedance changes, are disclosed, comprising supporting a bio-sensor on a carrier, the bio-sensor comprising an electronic component having at least one micro-electrode and at least one electrical contact, functionalizing the bio-sensor by physically or chemically coupling a bio-receptor molecule to each of the at least one micro-electrode, and subsequently assembling the bio-sensor with a micro-fluidic unit by means of a clamp which clamps the bio-sensor with the micro-fluidic unit, such that in use a fluid introduced into the micro-fluidic unit is able to contact the bio-receptor and is isolated from the electrical contact. The clamp may be a spring, and the method may avoid a requirement for sealing by chemical or thermal means and thereby avoid damaging the bio-receptor. Sensors which can be assembled according to such methods are also disclosed.Type: ApplicationFiled: March 8, 2011Publication date: September 8, 2011Applicant: NXP B.V.Inventors: Romano HOOFMAN, Gerard REUVERS, Franciscus Petrus WIDDERSHOVEN, Evelyne GRIDELET, Marcus Henricus van KLEEF