Abstract: In a data carrier (1) that is arranged to receive a signal (S) in a non-contacting manner there is provided a circuit (2) that is arranged, by using the signal (S), to generate a supply voltage (V) for parts of the circuit (2), the circuit (2) has a storage stage (5) that is arranged to store information capacitively, the information being represented by a value of an information voltage (UI) arising at the storage stage (5), which value of the information voltage (UI) is at most equal to the value of the supply voltage (V), and the circuit (2) has an evaluation stage (14) to which the information voltage can be fed and that are arranged to evaluate the information voltage (UI), with the help of a comparison voltage (UC), for the information represented by the information voltage (UI), the comparison-voltage generating stage (15) that is arranged to generate and emit the comparison voltage (UC) being implemented separately from the evaluation stage (14), and the evaluation stage (14) being arranged to receive

Abstract: In a data carrier (1) that is arranged to receive a signal (S) in a non-contacting manner, there is provided a circuit (2) that is arranged, by using the signal (S), to generate a supply voltage (V) for parts of the circuit (2), the circuit (2) having a storage stage (5) that is arranged to store information capacitively, the information being represented by a value of an information voltage (UI) arising at the storage stage (5), and the circuit (2) having an information-voltage generating stage (6) that is arranged to receive a control signal (CS), which control signal (CS) is of a voltage value that is at most equal to the value of the supply voltage (V), and that is arranged to generate the information voltage (UI) by using the control signal (CS), wherein the information-voltage generating stage (6) has a voltage-raising stage (8) that is arranged to raise the value of the voltage of the control signal (CS).

Abstract: Provided in a data carrier (1) designed to modulate a carrier signal (CS) that can be received in a contactless manner are transmission means (2) designed to transmit the carrier signal (CS), and a data signal source (9) designed to generate and emit a data signal (DS), and modulation means (11), which modulation means (11) is designed to receive the data signal (DS) and, using the data signal (DS), to modulate the carrier signal (CS) occurring at the transmission means (2) and to generate an amplitude-modulated signal (S), which amplitude-modulated signal (S) has signal edges (SL), wherein, in addition, signal-edge influencing means (12) is provided, which is designed to influence the slope characteristic of the signal edges (SL) in the amplitude-modulated signal (S).

Abstract: An integrated circuit (6) has a semiconductor die (47) and an integrated circuit configuration (16) realized on the semiconductor die (47) and situated within bounding faces (52, 53, 54, 55) of the semiconductor die (47), in which two conductor track sections (34, 35) have been provided, which issue from the integrated circuit configuration (16) and which each extend up to a bounding face (55) and which are required for the application of a useful signal (BR1) utilized for test purposes during the fabrication of the integrated circuit (6), and in which an additional conductor track section (41) has been provided, which is disposed adjacent the two conductor track sections (34, 35) and which issues from the integrated circuit configuration (16) and extends toward a bounding surface (55) and preferably up to this bounding face (55) and which serves for the application of a spurious signal (BR2) which interferes with testing.

Abstract: An integrated circuit (6) has a semiconductor die (47) and an integrated circuit configuration (16) realized on the semiconductor die (47) and situated within bounding faces (52, 53, 54, 55) of the semiconductor die (47), in which two conductor track sections (34, 35) have been provided, which issue from the integrated circuit configuration (16) and which each extend up to a bounding face (55) and which are required for the application of a useful signal (BR1) utilized for test purposes during the fabrication of the integrated circuit (6), and in which an additional conductor track section (41) has been provided, which is disposed adjacent the two conductor track sections (34, 35) and which issues from the integrated circuit configuration (16) and extends toward a bounding surface (55) and preferably up to this bounding face (55) and which serves for the application of a spurious signal (BR2) which interferes with testing.