Abstract: In a general aspect, a superconducting quantum processing circuit includes a tunable qubit device. The tunable qubit device includes a circuit loop configured to receive, during operation of the tunable qubit device, a magnetic flux that controls a qubit frequency of the tunable qubit device. In some aspects, the circuit loop consists of: a single non-linear circuit element and one or more linear circuit elements. The single non-linear circuit element is a Josephson junction connected between a first circuit node and a second circuit node. The one or more linear circuit elements includes a linear inductor connected in parallel with the Josephson junction between the first circuit node and the second circuit node.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: A quantum computing system that includes a quantum circuit device having at least one operating frequency; a first substrate having a first surface on which the quantum circuit device is disposed; a second substrate having a first surface that defines a recess of the second substrate, the first and second substrates being arranged such that the recess of the second substrate forms an enclosure that houses the quantum circuit device; and an electrically conducting layer that covers at least a portion of the recess of the second substrate.

Abstract: In some implementations, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.

Abstract: In a general aspect, a superconducting quantum processing unit includes a first qubit device, a second qubit device, and a tunable floating coupler device coupled between the first and second qubit devices. Values of a coupling strength of the first and second qubit devices at a plurality of operating points of the tunable floating coupler device are measured. The operating points correspond to respective values of a magnetic flux applied to the tunable floating coupler device. Based on the measured values of the coupling strength, a parking value of the magnetic flux is identified. The parking value of the magnetic flux corresponds to a magnitude of the coupling strength being less than or equal to a threshold value; the threshold value is associated with a target gate fidelity for the superconducting quantum processing unit.

Abstract: In a general aspect, junction properties of tunnel junctions are altered by voltage-assisted annealing processes. In some cases, a method includes obtaining a circuit comprising a tunnel junction, modifying a junction resistance of the tunnel junction by applying a voltage across the tunnel junction, and obtaining a measured value of the junction resistance. The tunnel junction may include a metal and a metal oxide.

Abstract: In a general aspect, a quantum state transferring process is performed in a computing network. In some implementations, a method of transferring a quantum state between nodes in a computing network includes receiving a signal at a first node transmitted on a transmission line from a second node. The first node includes a superconducting quantum processing circuit including a tunable-frequency coupler device with a superconducting circuit loop and a first resonator device having a tunable linewidth. The first resonator device is capacitively coupled to the tunable-frequency coupler coupled to the transmission line. The second node includes a second resonator device having a fixed linewidth coupled to the transmission line. The method includes modifying the tunable linewidth of the first resonator device over time while the signal transfers a quantum state to the first resonator device from the second resonator device, by varying a magnetic flux pulse applied to the superconducting circuit loop.

Abstract: In a general aspect, junction properties of tunnel junctions are altered by voltage-assisted annealing processes. In some cases, a method includes obtaining a circuit comprising a tunnel junction, modifying a junction resistance of the tunnel junction by applying a voltage across the tunnel junction, and obtaining a measured value of the junction resistance. The tunnel junction may include a metal and a metal oxide.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Abstract: In a general aspect, iSWAP gates are calibrated on a superconducting quantum processing unit. In some aspects, initial values of control parameters to apply the iSWAP gate on a pair of qubits defined by first and second qubit devices of the superconducting quantum processing unit are identified. Phase tracking devices associated with the first and second qubit devices of the superconducting quantum processing unit are initialized. After initiating the phase tracking devices, shifts in local phases of the pair of qubits are determined based on one or more applications of the iSWAP gate to the pair of qubits. The one or more applications of the iSWAP gate to the pair of qubits is performed using the initial values of the control parameters. Updated values of one or more of the control parameters are generated based on the shifts in local phases and outputs of the phase tracking devices.

Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Abstract: In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Abstract: In a general aspect, a surface code syndrome measurement is performed on a superconducting quantum processing unit. In some implementations, the superconducting quantum processing unit is caused to apply a quantum error correction code including X-type and Z-type stabilizer check patches. Each of the X-type and Z-type stabilizer check patches includes a stabilizer check qubit device and data qubit devices of the superconducting quantum processing unit. Applying the quantum error correction code includes iteratively twirling the data qubit devices in a stabilizer check patch; and evolving the stabilizer check qubit device in the stabilizer check patch and the data qubit devices in the stabilizer check patch under an interaction Hamiltonian. The interaction Hamiltonian includes a plurality of terms interactions between the stabilizer check qubit device in the stabilizer check patch and a respective one of the data qubit devices in the stabilizer check patch.

Abstract: In a general aspect, two-qubit quantum gate operations are performed in a superconducting quantum processing unit. In some cases, a flux modulation signal is generated. The flux modulation signal is configured to modulate a transition frequency of a first tunable-frequency qubit device in a superconducting quantum processing unit such that a time average of the transition frequency of the first tunable-frequency qubit device over a duration of the flux modulation signal is on resonance with a transition frequency of a second qubit device in the superconducting quantum processing unit. A two-qubit quantum logic gate is applied to a pair of qubits defined by the first tunable-frequency qubit device and the second qubit device. Applying the two-qubit quantum logic gate includes communicating the flux modulation signal to a flux bias control line coupled to the first tunable-frequency qubit device.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.

Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.

Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.