Patents by Inventor F. Scott Johnson

F. Scott Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming a self-aligned BJT emitter contact
    Patent number: 6194280
    Abstract: A bipolar transistor includes a collector region, an intrinsic base region within the collector region, an extrinsic base region within the collector region, and a base link-up region within the collector region between the intrinsic base region and the extrinsic base region. An emitter region is positioned within the intrinsic base region. A base electrode overlays and is in electrical communication with a portion of the extrinsic base region and the base link-up region, and a doped inter-polysilicon dielectric layer overlays a portion of the base electrode. A capping layer is positioned above the inter-polysilicon dielectric layer; and an emitter electrode overlays the inter-polysilicon dielectric layer and the emitter region. The doped inter-polysilicon dielectric layer is the dopant source for forming the extrinsic base region and the base link-up region.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: February 27, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • Doped polysilicon to retard boron diffusion into and through thin gate dielectrics
    Patent number: 6030874
    Abstract: An embodiment of the instant invention is a method of fabricating a semiconductor device which includes a dielectric layer situated between a conductive structure and a semiconductor substrate, the method comprising the steps of: forming the dielectric layer (layer 14) on the semiconductor substrate (substrate 12); forming the conductive structure (structure 18) on the dielectric layer; doping the conductive structure with boron; and doping the conductive structure with a dopant which inhibits the diffusion of boron. The semiconductor device may be a PMOS transistor or a capacitor. Preferably, the conductive structure is a gate structure. The dielectric layer is, preferably, comprised of a material selected from the group consisting of: an oxide, an oxide/oxide stack, an oxide/nitride stack, and an oxynitride. Preferably, the dopant which inhibits the diffusion of boron comprises at least one group III or group IV element.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: February 29, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Douglas T. Grider, Stanton P. Ashburn, Katherine E. Violette, F. Scott Johnson
  • Reduced resistance base contact for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer
    Patent number: 6028345
    Abstract: A bipolar transistor (100) and a method for forming the same. A diffusion source dielectric layer (118) is deposited over a semiconductor body (101). An emitter window (116) is then etched through the diffusion source dielectric layer (118). An extrinsic base region (110) is diffused from the diffusion source dielectric layer (118). The intrinsic base region (108) is then implanted. Base-emitter spacers (120) are then formed followed by the emitter electrode (124) and emitter region (126). The extrinsic base region (110) is self-aligned to the emitter eliminating the alignment tolerances for the lateral diffusion of the extrinsic base implant and an extrinsic base implant.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 22, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • High speed bipolar transistor using a patterned etch stop and diffusion source
    Patent number: 5629556
    Abstract: A bipolar transistor (100) and a method for forming the same. A base-link diffusion source layer (118) is formed over a portion of the collector region (102). The base-link diffusion source layer (118) comprises a material that is capable of being used as a dopant source and is capable of being etched selectively with respect to silicon. A base electrode (114) is formed over at least one end portion of the base-link diffusion source layer (118) and the exposed portions of the base-link diffusion source layer (118) are removed. An extrinsic base region (110) is diffused from the base electrode (114) and a base link-up region (112) is diffused from the base-link diffusion source layer (118). Processing may then continue to form an intrinsic base region (108), emitter region (126), and emitter electrode (124).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 13, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • High speed bipolar transistor using a patterned etch stop and diffusion source
    Patent number: 5616508
    Abstract: A bipolar transistor (100) and a method for forming the same. A base-link diffusion source layer (118) is formed over a portion of the collector region (102). The base-link diffusion source layer (118) comprises a material that is capable of being used as a dopant source and is capable of being etched selectively with respect to silicon. A base electrode (114) is formed over at least one end portion of the base-link diffusion source layer (118) and the exposed portions of the base-link diffusion source layer (118) are removed. An extrinsic base region (110) is diffused from the base electrode (114) and a base link-up region (112) is diffused from the base-link diffusion source layer (118). Processing may then continue to form an intrinsic base region (108), emitter region (126), and emitter electrode (124).
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: April 1, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • Method of forming stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link
    Patent number: 5593905
    Abstract: A bipolar transistor (100) and a method for forming the same. A base-link diffusion source layer (118) is formed over a portion of the collector region (102). The base-link diffusion source layer (118) comprises a material that is capable of being used as a dopant source and is capable of being etched selectively with respect to silicon. A barrier layer (119) is formed over the base-link diffusion source layer (118).A base electrode (114) is formed over at least one end portion of the barrier layer (119) and base-link diffusion source layer (118) and the exposed portions of the barrier layer (119) and underlying base-link diffusion source layer (118) are removed. An extrinsic base region (110) is diffused from the base electrode (114) and a base link-up region (112) is diffused from the base-link diffusion source layer (118). Processing may then continue to fore an intrinsic base region (108), emitter region (126), and emitter electrode (124).
    Type: Grant
    Filed: February 23, 1995
    Date of Patent: January 14, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: F. Scott Johnson, Kelly Taylor
  • Self-aligned double poly BJT using sige spacers as extrinsic base contacts
    Patent number: 5592017
    Abstract: A bipolar transistor (100) and a method for forming the same. A base electrode (114) is separated from the collector region (102) by an insulator layer (110). A doped conductive spacer (115) is formed laterally adjacent the base electrode (114). The conductive spacer (115) comprises a conductive material that is capable of serving as a dopant source for n and p-type dopants and is able to be selectively etched with respect to silicon (e.g., silicon-germanium). Base link-up region (112) is diffused from conductive spacer (115) into the collector region (102). Processing then continues to form an intrinsic base region (108), emitter region (126), and emitter electrode (124).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 7, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer
    Patent number: 5541121
    Abstract: A bipolar transistor (100) and a method for forming the same. A diffusion source dielectric layer (118) is deposited over a semiconductor body (101). An emitter window (116) is then etched through the diffusion source dielectric layer (118). An extrinsic base region (110) is diffused from the diffusion source dielectric layer (118). The intrinsic base region (108) is then implanted. Base-emitter spacers (120) are then formed followed by the emitter electrode (124) and emitter region (126). The extrinsic base region (110) is self-aligned to the emitter eliminating the alignment tolerances for the lateral diffusion of the extrinsic base implant and an extrinsic base implant.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: July 30, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: F. Scott Johnson
  • Stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link
    Patent number: 5502330
    Abstract: A bipolar transistor (100) and a method for forming the same. A base-link diffusion source layer (118) is formed over a portion of the collector region (102). The base-link diffusion source layer (118) comprises a material that is capable of being used as a dopant source and is capable of being etched selectively with respect to silicon. A barrier layer (119) is formed over the base-link diffusion source layer (118). A base electrode (114) is formed over at least one end portion of the barrier layer (119) and base-link diffusion source layer (118) and the exposed portions of the barrier layer (119) and underlying base-link diffusion source layer (118) are removed. An extrinsic base region (110) is diffused from the base electrode (114) and a base link-up region (112) is diffused from the base-link diffusion source layer (118). Processing may then continue to form an intrinsic base region (108), emitter region (126), and emitter electrode (124).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 26, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: F. Scott Johnson, Kelly Taylor