Patents by Inventor Fa-Long Luo

Fa-Long Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103929
    Abstract: Apparatuses, systems, and methods related to memory pooling between selected memory resources are described. A system using a memory pool formed as such may enable performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, one apparatus described herein includes a memory resource, a processing resource coupled to the memory resource, and a transceiver resource coupled to the processing resource. The memory resource, the processing resource, and the transceiver resource are configured to enable formation of a memory pool between the memory resource and another memory resource at another apparatus responsive to a request to access the other memory resource transmitted from the processing resource via the transceiver.
    Type: Application
    Filed: July 24, 2023
    Publication date: March 28, 2024
    Inventors: Aaron P. Boehm, Glen E. Hush, Fa-Long Luo
  • Patent number: 11941516
    Abstract: Systems, methods, and apparatuses related to cooperative learning neural networks are described. Cooperative learning neural networks may include neural networks which utilize sensor data received wirelessly from at least one other wireless communication device to train the neural network. For example, cooperative learning neural networks described herein may be used to develop weights which are associated with objects or conditions at one device and which may be transmitted to a second device, where they may be used to train the second device to react to such objects or conditions. The disclosed features may be used in various contexts, including machine-type communication, machine-to-machine communication, device-to-device communication, and the like. The disclosed techniques may be employed in a wireless (e.g., cellular) communication system, which may operate according to various standardized protocols.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Tamara Schmitz, Jeremy Chritz, Jaime Cummins
  • Patent number: 11941518
    Abstract: Systems, methods, and apparatuses related to cooperative learning neural networks are described. Cooperative learning neural networks may include neural networks which utilize sensor data received wirelessly from at least one other wireless communication device to train the neural network. For example, cooperative learning neural networks described herein may be used to develop weights which are associated with objects or conditions at one device and which may be transmitted to a second device, where they may be used to train the second device to react to such objects or conditions. The disclosed features may be used in various contexts, including machine-type communication, machine-to-machine communication, device-to-device communication, and the like. The disclosed techniques may be employed in a wireless (e.g., cellular) communication system, which may operate according to various standardized protocols.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Tamara Schmitz, Jeremy Chritz, Jaime Cummins
  • Patent number: 11928177
    Abstract: Methods and apparatus for performing video processing matrix operations within a memory fabric. Various embodiments of the present disclosure are directed to converting a memory array into a matrix fabric for discrete cosine transform (DCT) matrix transformations and performing DCT matrix operations therein. Exemplary embodiments described herein perform DCT matrix-matrix multiplication operations within a memory device that includes a matrix fabric and matrix multiplication unit (MMU). In one embodiment, matrix-matrix multiplication operations are obtained using separate matrix-vector products. In one exemplary embodiment, the matrix fabric uses a “crossbar” construction of resistive elements. Each resistive element stores a level of impedance that represents the corresponding matrix coefficient value. The crossbar connectivity can be driven with an electrical signal representing the input vector as an analog voltage.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: March 12, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Fa-Long Luo
  • Publication number: 20240078286
    Abstract: Methods and apparatus for performing diversity matrix operations within a memory fabric. Various embodiments of the present disclosure are directed to converting a memory array into a matrix fabric for spatial diversity-related matrix transformations and performing matrix operations therein. Exemplary embodiments described herein perform MIMO-related matrix transformations (e.g., precoding, beamforming, or data recovery matrix operations) within a memory device that includes a matrix fabric and matrix multiplication unit (MMU). In one variant, the matrix fabric uses a “crossbar” construction of resistive elements. Each resistive element stores a level of impedance that represents the corresponding matrix coefficient value. The crossbar connectivity can be driven with an electrical signal representing the input vector as an analog voltage. The resulting signals can be converted from analog voltages to a digital values by an MMU to yield a matrix-vector product.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Inventor: Fa-Long Luo
  • Publication number: 20240078040
    Abstract: Examples described herein include systems and methods which include a multiple input, multiple output transceiver including a plurality of receive antenna configured to receive a plurality of receive signals, and a wireless receiver coupled to the plurality of antenna and configured to receive and decode the plurality of receive signals. The transceiver includes a memory array and a memory controller. The memory controller includes a data address generator configured to, during the decode of the plurality of receive signals, generate at least one memory address according to an access mode of a memory command associated with a memory access operation. The at least one memory address corresponds to a specific sequence of memory access instructions to access a memory cell of the memory array.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Jaime Cummins
  • Patent number: 11902411
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of cross correlation including symbols indicative of radio frequency (RF) energy. An electronic device including a statistic calculator may be configured to calculate a statistic including the cross-correlation of the symbols. The electronic device may include a comparator configured to provide a signal indicative of a presence or absence of a wireless communication signal in the particular portion of the wireless spectrum based on a comparison of the statistic with a threshold. A decoder/precoder may be configured to receive the signal indicative of the presence or absence of the wireless communication signal and to decode the symbols responsive to a signal indicative of the presence of the wireless communication signal. Examples of systems and methods described herein may facilitate the processing of data for wireless communications in a power-efficient and time-efficient manner.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: February 13, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Tamara Schmitz, Jeremy Chritz, Jaime Cummins
  • Patent number: 11893398
    Abstract: Methods, apparatuses, and systems for implementing data flows in a processor are described herein. A data flow manager may be configured to generate a configuration packet for a compute operation based on status information regarding multiple processing elements of the processor. Accordingly, multiple processing elements of a processor may concurrently process data flows based on the configuration packet. For example, the multiple processing elements may implement a mapping of processing elements to memory, while also implementing identified paths, through the processor, for the data flows. After executing the compute operation at certain processing elements of the processor, the processing results may be provided. In speech signal processing operations, the processing results may be compared to phonemes to identify such components of human speech in the processing results.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: February 6, 2024
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Jeremy Chritz, Tamara Schmitz, Fa-Long Luo, David Hulton
  • Patent number: 11894957
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self interference noise calculator. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into sets of intermediate results. Each set of intermediate results may be summed in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is received by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same frequency band as the wireless receiver is receiving.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: February 6, 2024
    Inventors: Fa-Long Luo, Jeremy Chritz, Jaime Cummins, Tamara Schmitz
  • Publication number: 20240036875
    Abstract: Systems, apparatuses, and methods for organizing bits in a memory device are described. In a number of embodiments, an apparatus can include an array of memory cells, a data interface, a multiplexer coupled between the array of memory cells and the data interface, and a controller coupled to the array of memory cells, the controller configured to cause the apparatus to latch bits associated with a row of memory cells in the array in a number of sense amplifiers in a prefetch operation and send the bits from the sense amplifiers, through a multiplexer, to a data interface, which may include or be referred to as DQs. The bits may be sent to the DQs in a particular order that may correspond to a particular matrix configuration and may thus facilitate or reduce the complexity of arithmetic operations performed on the data.
    Type: Application
    Filed: October 9, 2023
    Publication date: February 1, 2024
    Inventors: Glen E. Hush, Aaron P. Boehm, Fa-Long Luo
  • Patent number: 11870513
    Abstract: Examples described herein include systems and methods, including wireless devices and systems with neuron calculators that may perform one or more functionalities of a wireless transceiver. The neuron calculator calculates output signals that may be implemented, for example, using accumulation units that sum the multiplicative processing results of ordered sets from ordered neurons with connection weights for each connection between an ordered neuron and outputs of the neuron calculator. The ordered sets may be a combination of some input signals, with the number of signals determined by an order of the neuron. Accordingly, a kth-order neuron may include an ordered set comprising product values of k input signals, where the input signals are selected from a set of k-combinations with repetition. As an example in a wireless transceiver, the neuron calculator may perform channel estimation as a channel estimation processing component of the receiver portion of a wireless transceiver.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Jaime Cummins, Tamara Schmitz, Jeremy Chritz
  • Patent number: 11853385
    Abstract: Methods and apparatus for performing diversity matrix operations within a memory fabric. Various embodiments of the present disclosure are directed to converting a memory array into a matrix fabric for spatial diversity-related matrix transformations and performing matrix operations therein. Exemplary embodiments described herein perform MIMO-related matrix transformations (e.g., precoding, beamforming, or data recovery matrix operations) within a memory device that includes a matrix fabric and matrix multiplication unit (MMU). In one variant, the matrix fabric uses a “crossbar” construction of resistive elements. Each resistive element stores a level of impedance that represents the corresponding matrix coefficient value. The crossbar connectivity can be driven with an electrical signal representing the input vector as an analog voltage. The resulting signals can be converted from analog voltages to a digital values by an MMU to yield a matrix-vector product.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: December 26, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Fa-Long Luo
  • Patent number: 11838046
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self-interference noise calculator. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into intermediate results according to input data and delayed versions of the intermediate results. Each set of intermediate results may be combined in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is received by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same frequency band as the wireless receiver is receiving.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: December 5, 2023
    Inventor: Fa-Long Luo
  • Patent number: 11791872
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of an autocorrelation calculator. An electronic device including an autocorrelation calculator may be configured to calculate an autocorrelation matrix including an autocorrelation of symbols indicative of a first narrowband Internet of Things (IoT) transmission and a second narrowband IoT transmission. The electronic device may calculate the autocorrelation matrix based on a stored autocorrelation matrix and the autocorrelation of symbols indicative of the first narrowband IoT transmission and symbols indicative of the second narrowband IoT transmission. The stored autocorrelation matrix may represent another received signal at a different time period than a time period of the first and second narrowband IoT transmission.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: October 17, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Tamara Schmitz, Jeremy Chritz, Jaime Cummins
  • Patent number: 11782721
    Abstract: Systems, apparatuses, and methods for organizing bits in a memory device are described. In a number of embodiments, an apparatus can include an array of memory cells, a data interface, a multiplexer coupled between the array of memory cells and the data interface, and a controller coupled to the array of memory cells, the controller configured to cause the apparatus to latch bits associated with a row of memory cells in the array in a number of sense amplifiers in a prefetch operation and send the bits from the sense amplifiers, through a multiplexer, to a data interface, which may include or be referred to as DQs. The bits may be sent to the DQs in a particular order that may correspond to a particular matrix configuration and may thus facilitate or reduce the complexity of arithmetic operations performed on the data.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: October 10, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Glen E. Hush, Aaron P. Boehm, Fa-Long Luo
  • Publication number: 20230308518
    Abstract: Methods and apparatus for incentivizing device participation within a distributed network. In one exemplary embodiment, devices of a fog network may provide for example, computational, storage, and/or network resources in exchange for fungible tokens. In one such variant, the user contributions are recorded in a blockchain data structure, thereby enabling users to be compensated for their contributions of resources to the network at a later time. Unlike traditional networking techniques which often rely on centralized networks directing and/or commandeering user equipment for network bandwidth, the various aspects of the present disclosure are directed to ensuring that crediting and debiting of participation can be performed at the edge of the network (within the fog) without requiring authentication or trust exchanges. More directly, various aspects of the present disclosure are directed to verification and/or validation of work performed by peer devices.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 28, 2023
    Inventors: Richard Cameron Murphy, Fa-Long Luo
  • Patent number: 11755408
    Abstract: Examples described herein utilize multi-layer neural networks, such as multi-layer recurrent neural networks, to estimate a bit error rate (BER) of encoded data based on a retrieved version of encoded data (e.g., data encoded using one or more encoding techniques) from a memory. The neural networks may have nonlinear mapping and distributed processing capabilities which may be advantageous to estimate a BER of encoded data, e.g., to facilitate decoding of the encoded data. In this manner, neural networks described herein may be used to improve or facilitate aspects of decoding at ECC decoders, e.g., by comparing an estimated BER to a threshold (e.g., a threshold BER level) prior to decoding of the encoded data. For example, an additional NN activation indication may be provided, e.g., to indicate that the encoded data may be decoded or to indicate that error present in the encoded data is to be reduced.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: September 12, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Jaime Cummins
  • Publication number: 20230283405
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The processing mode selection may include a single processing mode, a multi-processing mode, or a full processing mode. The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 7, 2023
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: FA-LONG LUO, JAIME CUMMINS, JEREMY CHRITZ, TAMARA SCHMITZ
  • Patent number: 11751031
    Abstract: Methods, apparatuses, and systems related to wireless main memory for computing are described. A device may include a processor that is wirelessly coupled to a memory array, which may be in a physically separate device. The processor may execute instructions stored in and wirelessly communicated from the memory array. The processor may read data from or write data to the memory array via a wireless communication link (e.g., using resources of an ultra high frequency, super high frequency, and/or extremely high frequency band). Several devices may have a small amount of local memory (or no local memory) and may share, via a wireless communication link, a main memory array. Memory devices may include memory resources and transceiver resources; they may be configured to use one or several communication protocols over licensed or shared frequency spectrum bands, directly (e.g., device-to-device) or indirectly (e.g., via a base station).
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: September 5, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Fa-Long Luo, Glen E. Hush, Aaron P. Boehm
  • Publication number: 20230262731
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of configuration modes for baseband units (BBU) and remote radio heads (RRH). For example, a computing system including a BBU and a RRH may receive a configuration mode selection including information indicative of a configuration mode for respective processing units of the BBU and the RRH. The computing system allocates the respective processing units to perform wireless processing stages associated with a wireless protocol. The BBU and/or the RRH may generate an output data stream based on the mixing of coefficient data with input data at the BBU and/or the RRH. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: FA-LONG LUO, JAIME CUMMINS, TAMARA SCHMITZ, JEREMY CHRITZ