Abstract: An electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure has a compressibility in a range between 1% and 20%, in particular in a range between 5% and 15%.

Abstract: A reverse-blocking IGBT (insulated gate bipolar transistor) includes a plurality of IGBT cells disposed in a device region of a semiconductor substrate, a reverse-blocking edge termination structure disposed in a periphery region of the semiconductor substrate which surrounds the device region, one or more trenches formed in the periphery region between the reverse-blocking edge termination structure and an edge face of the semiconductor substrate, a p-type dopant source at least partly filling the one or more trenches, and a continuous p-type doped region disposed in the periphery region and formed from p-type dopants out-diffused from the p-type dopant source. The continuous p-type doped region extends from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate.

Abstract: A device includes a circuit element, a housing for the circuit element and a terminal for coupling the circuit element to an electrical circuit. The terminal includes an engagement portion and a sleeve portion. The engagement portion is configured to engage a base for the electrical circuit. The sleeve portion couples the engagement portion to the circuit element. The housing encloses the sleeve portion.

Abstract: Various embodiments provide an electronic module comprising a baseplate. A recess is formed in one main surface of the baseplate, wherein the recess is adapted to accommodate an electronic chip. The electronic chip is attached to a substrate or carrier and is placed in the recess.

Abstract: A device includes a circuit element, a housing for the circuit element and a terminal for coupling the circuit element to an electrical circuit. The terminal includes an engagement portion and a sleeve portion. The engagement portion is configured to engage a base for the electrical circuit. The sleeve portion couples the engagement portion to the circuit element. The housing encloses the sleeve portion.

Abstract: A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.

Abstract: A reverse-blocking IGBT (insulated gate bipolar transistor) includes a plurality of IGBT cells disposed in a device region of a semiconductor substrate, a reverse-blocking edge termination structure disposed in a periphery region of the semiconductor substrate which surrounds the device region, one or more trenches formed in the periphery region between the reverse-blocking edge termination structure and an edge face of the semiconductor substrate, a p-type dopant source at least partly filling the one or more trenches, and a continuous p-type doped region disposed in the periphery region and formed from p-type dopants out-diffused from the p-type dopant source. The continuous p-type doped region extends from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate.

Abstract: Various embodiments provide an electronic module comprising a baseplate. A recess is formed in one main surface of the baseplate, wherein the recess is adapted to accommodate an electronic chip. The electronic chip is attached to a substrate or carrier and is placed in the recess.

Abstract: A method of manufacturing a reverse-blocking IGBT (insulated gate bipolar transistor) includes forming a plurality of IGBT cells in a device region of a semiconductor substrate, forming a reverse-blocking edge termination structure in a periphery region of the semiconductor substrate which surrounds the device region, etching one or more trenches in the periphery region between the reverse-blocking edge termination structure and a kerf region of the semiconductor substrate, depositing a p-type dopant source which at least partly fills the one or more trenches and diffusing p-type dopants from the p-type dopant source into semiconductor material surrounding the one or more trenches, so as to form a continuous p-type doped region in the periphery region which extends from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate after thinning of the semiconductor substrate at the bottom surface.

Abstract: Various embodiments provide methods for manufacturing a baseplate for an electronic module and an electronic module comprising a baseplate, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.

Abstract: An electronic module is provided, comprising an electronic chip arranged in the electronic module; at least two contact terminals electrically connected to the electronic chip each extending out of a package of the electronic module, wherein at least one of the at least two contact terminals is a signal contact terminal comprising a distal signal contact area, and at least another one of the at least two contact terminals is a power contact terminal comprising a distal power contact area; wherein the distal power contact area is adapted to be electrically connected to a power circuit external to the electronic module, wherein the external power circuit is oriented in a first plane; and wherein the distal signal contact area is adapted to be electrically connected to a signal circuit external to the electronic module, wherein the external signal circuit is oriented in a second plane extending perpendicular to the first plane.

Abstract: An electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure has a compressibility in a range between 1% and 20%, in particular in a range between 5% and 15%.

Abstract: Various embodiments provide methods for manufacturing a baseplate for an electronic module and an electronic module comprising a baseplate, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.

Abstract: Various embodiments provide a baseplate for an electronic module, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.

Abstract: In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.

Abstract: An electronic module is provided, comprising an electronic chip arranged in the electronic module; at least two contact terminals electrically connected to the electronic chip each extending out of a package of the electronic module, wherein at least one of the at least two contact terminals is a signal contact terminal comprising a distal signal contact area, and at least another one of the at least two contact terminals is a power contact terminal comprising a distal power contact area; wherein the distal power contact area is adapted to be electrically connected to a power circuit external to the electronic module, wherein the external power circuit is oriented in a first plane; and wherein the distal signal contact area is adapted to be electrically connected to a signal circuit external to the electronic module, wherein the external signal circuit is oriented in a second plane extending perpendicular to the first plane.

Abstract: Various embodiments provide a baseplate for an electronic module, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip.

Abstract: A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.

Abstract: A semiconductor package includes a base, a die attached to the base, a lead and a connector electrically connecting the lead to the die. A mold compound encapsulates the die, the connector, at least part of the base, and part of the lead, so that the lead extends outward from the mold compound. An electrical insulation layer separate from the mold compound is attached to a surface of the mold compound over the connector. The electrical insulation layer has a fixed, defined thickness so that the package has a guaranteed minimum spacing between an apex of the connector and a surface of the electrical insulation layer facing away from the connector.

Abstract: In accordance with an embodiment of the present invention, a semiconductor package includes a die paddle, and an encapsulant disposed around the die paddle. The semiconductor package has a first sidewall and a second sidewall. The second sidewall is perpendicular to the first sidewall. The first sidewall and the second sidewall define a corner region. A tie bar is disposed within the encapsulant. The tie bar couples the die paddle and extends away from the die paddle. A dummy lead is disposed in the corner region. The dummy lead is not electrically coupled to another electrically conductive component within the semiconductor package. The distance between the dummy lead and the tie bar is less than a shortest distance between the tie bar and other leads or other tie bars in the semiconductor package.