Abstract: An ultrasonic probe includes: an ultrasonic transducer; an amplification stage; a bias circuit, which determines a bias voltage on an input terminal of the amplification stage; and a selector having an intermediate node, a high-voltage switch between the intermediate node and the transducer, and a first low-voltage switch between the intermediate node and the input terminal. A control unit controls the high-voltage switch and the first low-voltage switch so as to alternately couple and decouple the amplification stage and the transducer. A precharge circuit determines a precharge voltage on the intermediate node as a function of the bias voltage, before the amplification stage and the transducer are coupled.

Abstract: A programmable-gain amplifier includes: two complementary cross-coupled transistor pairs mutually coupled with each transistor in one pair having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair. First and second coupling points are formed between the pairs; with first and second sampling capacitors coupled thereto. First and second input stages have input terminals to input signals for sampling by the first and second sampling capacitors. Switching means couple the first and second input stages to the sampling capacitors so the input signals are sampled as sampled signals on the sampling capacitors. The switching means energizes the complementary cross-coupled transistor pairs so the signals sampled on the sampling capacitors undergo negative resistance regeneration growing exponentially over time to thereby provide an exponential amplifier gain.

Abstract: An acoustic device includes a micro-machined acoustic transducer element, an acoustically attenuating region, and an acoustic matching region arranged between the acoustic transducer element and the acoustically attenuating region. The acoustic transducer element is formed in a first substrate housing a cavity delimiting a membrane. A second substrate of semiconductor material integrating an electronic circuit is arranged between the acoustic transducer element and the acoustically attenuating region. The acoustic matching region has a first interface with the second substrate and a second interface with the acoustically attenuating region. The acoustic matching region has an impedance matched to the impedance of the second substrate in proximity of the first interface, and an impedance matched to the acoustically attenuating region in proximity of the second interface.

Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit, which generates current-integrator drive currents. The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods. A current integrator integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.

Abstract: A programmable-gain amplifier includes: two complementary cross-coupled transistor pairs mutually coupled with each transistor in one pair having a current flow path cascaded with a current flow path of a respective one of the transistors in the other pair. First and second coupling points are formed between the pairs; with first and second sampling capacitors coupled thereto. First and second input stages have input terminals to input signals for sampling by the first and second sampling capacitors. Switching means couple the first and second input stages to the sampling capacitors so the input signals are sampled as sampled signals on the sampling capacitors. The switching means energizes the complementary cross-coupled transistor pairs so the signals sampled on the sampling capacitors undergo negative resistance regeneration growing exponentially over time to thereby provide an exponential amplifier gain.

Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit, which generates current-integrator drive currents. The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods. A current integrator integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.

Abstract: A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit, which generates current-integrator drive currents, a receiver, which amplifies transducer-echo signals, and control circuitry. The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods and reception of transducer-echo signals by the receiver during echo-reception periods. A current integrator integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.

Abstract: Described herein is a transceiver circuit for a capacitive micromachined ultrasonic transducer (CMUT), provided with: a transmitter stage, which generates excitation pulses for a first node of the CMUT transducer during a transmitting phase, a second node of the CMUT transducer being coupled to a biasing voltage; a receiver stage that is selectively coupled to the first node during a receiving phase and has an amplification stage; a switching stage that couples the receiver stage to the first node during the receiving phase and decouples the receiver stage from the first node during the transmitting phase. The amplification stage is provided with a charge amplifier that has an input terminal and is biased as a function of a biasing voltage; and the switching stage is coupled to the same biasing voltage thereby minimizing an injection of charge into the input terminal upon switching from the transmitting phase to the receiving phase.

Abstract: An ultrasonic probe includes: an ultrasonic transducer; an amplification stage; a bias circuit, which determines a bias voltage on an input terminal of the amplification stage; and a selector having an intermediate node, a high-voltage switch between the intermediate node and the transducer, and a first low-voltage switch between the intermediate node and the input terminal. A control unit controls the high-voltage switch and the first low-voltage switch so as to alternately couple and decouple the amplification stage and the transducer. A precharge circuit determines a precharge voltage on the intermediate node as a function of the bias voltage, before the amplification stage and the transducer are coupled.

Abstract: A low voltage isolation switch is suitable for receiving from a connection node a high voltage signal and transmitting said high voltage signal to a load via a connection terminal. The isolation switch includes a driving block connected between first and second voltage reference terminals and including a first driving transistor coupled between the first voltage reference (Vss) and a first driving circuit node and a second driving transistor coupled between the driving circuit node and the second supply voltage reference. The switch comprises an isolation block connected to the connection terminal (pzt), the connection node, and the driving central circuit node and including a voltage limiter block, a diode block and a control transistor. The control transistor is connected across the diode block between the connection node and the connection terminal and has a control terminal connected to the driving central circuit node.

Abstract: A low voltage isolation switch is coupled between an input terminal suitable for receiving a high voltage signal and an output terminal suitable for transmitting this high voltage signal to a load. The isolation switch includes a first driving transistor coupled between a first reference terminal and an intermediate node, a second driving transistor coupled between the intermediate node and the second reference terminal, a control transistor connected across a diode block coupled between the input and output terminals. The control transistor has a control terminal connected to the intermediate node through a low voltage decoupling block that includes first and second substrate terminals, first and second parasitic capacitive element connected to these first and second substrate terminals, and first and second decoupling transistors coupled in parallel to each other and having control terminals connected to the first and second parasitic capacitive elements, respectively.

Abstract: A low voltage isolation switch is suitable for receiving from a connection node a high voltage signal and transmitting said high voltage signal to a load via a connection terminal. The isolation switch includes a driving block connected between first and second voltage reference terminals and including a first driving transistor coupled between the first voltage reference (Vss) and a first driving circuit node and a second driving transistor coupled between the driving circuit node and the second supply voltage reference. The switch comprises an isolation block connected to the connection terminal (pzt), the connection node, and the driving central circuit node and including a voltage limiter block, a diode block and a control transistor. The control transistor is connected across the diode block between the connection node and the connection terminal and has a control terminal connected to the driving central circuit node.

Abstract: A low voltage isolation switch is coupled between an input terminal suitable for receiving a high voltage signal and an output terminal suitable for transmitting this high voltage signal to a load. The isolation switch includes a first driving transistor coupled between a first reference terminal and an intermediate node, a second driving transistor coupled between the intermediate node and the second reference terminal, a control transistor connected across a diode block coupled between the input and output terminals. The control transistor has a control terminal connected to the intermediate node through a low voltage decoupling block that includes first and second substrate terminals, first and second parasitic capacitive element connected to these first and second substrate terminals, and first and second decoupling transistors coupled in parallel to each other and having control terminals connected to the first and second parasitic capacitive elements, respectively.