Patents by Inventor Fabrice Jean
Fabrice Jean has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160105267Abstract: Proposed is an action machine for assembling response packets in a network processor. The action machine comprises: a first register array adapted to store data for entry into fixed-length fields of differing response packets, a fixed-length field having the same length in the differing response packets; and a second register array adapted to store data for entry into variable-length fields of differing response packets, a variable-length field having different values or lengths in the differing response packets. The action machine is adapted to assemble a response packet by combining data stored in the first register array with data stored in the second register array.Type: ApplicationFiled: September 23, 2015Publication date: April 14, 2016Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fabrice Jean VERPLANKEN, Francois ABEL, Jean-Paul ALDEBERT, Jean-Luc FRENOY
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Publication number: 20160095858Abstract: The present invention features a compound of formula I: or a pharmaceutically acceptable salt thereof, where R1, R2, R3, W, X, Y, Z, n, o, p, and q are defined herein, for the treatment of CFTR mediated diseases, such as cystic fibrosis. The present invention also features pharmaceutical compositions, method of treating, and kits thereof.Type: ApplicationFiled: October 6, 2015Publication date: April 7, 2016Applicant: VERTEX PHARMACEUTICALS INCORPORATEDInventors: Mark Thomas Miller, Corey Anderson, Vijayalaksmi Arumugam, Brian Richard Bear, Hayley Marie Binch, Jeremy J. Clemens, Thomas Cleveland, Erica Conroy, Timothy Richard Coon, Bryan A. Frieman, Peter Diederik Jan Grootenhuis, Raymond Stanley Gross, Sara Sabina Hadida-Ruah, Khatuya Haripada, Pramod Virupax Joshi, Paul John Krenitsky, Chun-Chieh Lin, Gulin Erdgogan Marelius, Vito Melillo, Jason McCartney, Georgia McGaughey Nicholls, Fabrice Jean Denis Pierre, Alina Silina, Andreas P. Termin, Johnny Uy, Jinglan Zhou
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Publication number: 20160085722Abstract: Proposed is an action machine for processing packet data in a network processor. The action machine comprises: first and second data storage units adapted to store data for processing; and a processing unit adapted to process data from the first and second data storage units. The first storage unit is adapted to be accessed by the processing unit and a unit external to the action machine, and the second storage unit is adapted to only be accessed by the processing unit.Type: ApplicationFiled: September 23, 2015Publication date: March 24, 2016Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fabrice Jean VERPLANKEN, Francois ABEL, Claude BASSO, Damon PHILIPPE
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Publication number: 20150381312Abstract: Method and apparatus for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. The method includes performing a first forward error-correcting (FEC) sub-function on the data in the PCS transmit structure. The method further includes transmitting the data on one or more physical medium attachment (PMA) lanes to a PCS receive structure. The method also includes performing a second FEC sub-function on the data in the PCS receive structure.Type: ApplicationFiled: June 30, 2014Publication date: December 31, 2015Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
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Publication number: 20150381339Abstract: Method and apparatus for reducing latency in a networking application comprises receiving data at a physical coding sublayer (PCS) from a media access control (MAC) sublayer, wherein the MAC sublayer utilizes a first clock domain operating at a first clock frequency. The method further comprises performing one or more functions in the PCS on the data in the first clock domain. The method also includes transmitting the data on one or more physical medium attachment (PMA) lanes, wherein the one or more PMA lanes utilize a second clock domain operating at a second clock frequency, wherein the first clock frequency and the second clock frequency have a fixed ratio. The method also comprises performing one or more functions in the PCS on the data in the second clock domain.Type: ApplicationFiled: July 29, 2014Publication date: December 31, 2015Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
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Publication number: 20150381338Abstract: Method and apparatus for reducing latency in a networking application comprises receiving data at a physical coding sublayer (PCS) from a media access control (MAC) sublayer, wherein the MAC sublayer utilizes a first clock domain operating at a first clock frequency. The method further comprises performing one or more functions in the PCS on the data in the first clock domain. The method also includes transmitting the data on one or more physical medium attachment (PMA) lanes, wherein the one or more PMA lanes utilize a second clock domain operating at a second clock frequency, wherein the first clock frequency and the second clock frequency have a fixed ratio. The method also comprises performing one or more functions in the PCS on the data in the second clock domain.Type: ApplicationFiled: June 30, 2014Publication date: December 31, 2015Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
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Publication number: 20150376889Abstract: An underdrain assembly for filtering particulates from a fluid having an upper structure connected to a bottom plate. At least one flow control vane is positioned between the upper structure and the bottom plate for directing and managing fluid flow through the assembly. The upper structure can have first and second filtration members, the second filtration member positioned between the first filtration member and the bottom plate. The second filtration member can have a shape that restricts fluid flow within the underdrain. The underdrain can have air and water inlets. The water inlet can have an end with a plate covering an upper portion thereof. The end can also include an opening having an angular cut forming an angle with respect to a longitudinal axis of the water inlet. Thus arranged, air is prevented from migrating out the water line. A resilient mounting arrangement for the underdrain is also disclosed.Type: ApplicationFiled: February 14, 2014Publication date: December 31, 2015Applicant: BILFINGER WATER TECHNOLOGIES, INC.Inventors: Michael Richard Ekholm, Richard Charles Maxson, Mark Edgar Watson, Fabrice Jean Alphonse Courageot
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Publication number: 20150381316Abstract: Method and apparatus for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. The method includes performing a first forward error-correcting (FEC) sub-function on the data in the PCS transmit structure. The method further includes transmitting the data on one or more physical medium attachment (PMA) lanes to a PCS receive structure. The method also includes performing a second FEC sub-function on the data in the PCS receive structure.Type: ApplicationFiled: July 29, 2014Publication date: December 31, 2015Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
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Patent number: 9215125Abstract: A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=<n×s/m.Type: GrantFiled: December 19, 2011Date of Patent: December 15, 2015Assignee: International Business Machines CorporationInventors: Claude Basso, Jean L. Calvignac, Chih-Jen Chang, Damon Philippe, Natarajan Vaidhyanathan, Colin B. Verrilli, Fabrice Jean Verplanken
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Publication number: 20150102017Abstract: A device for surfacing a metal alloy part by laser welding, the part including a recess to be surfaced and located at an overall planar area of the part, the device including a first protective element and a second protective element arranged on either side of the recess, the first protective element and the second protective element each having an irradiation surface which is to be at least partially covered with a layer of powder to enable welding by passing a laser beam over the layer of powder, the laser beam passing over the irradiation surface of the first protective element during welding and then the irradiation surface of the second protective element, the second protective element having a shape capable of containing a layer of powder having a height that is greater at the end, in the direction of propagation of the laser beam during welding, of the second protective element than at the start of the second protective element.Type: ApplicationFiled: December 21, 2012Publication date: April 16, 2015Inventors: Philippe Fabrice Jean-Yves Roussarie, Frédérique Laurence Machi, Nicolas Haettel, Thibaut Florent Wenger
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Publication number: 20150067792Abstract: Disclosed is a method, apparatus, and system to control the unlocking of an entry for a guest having a wireless device by an owner access point. A virtual key for a wireless device and an access control rule associated with the virtual key may be stored at the owner access point. The owner access point may determine whether a virtual key received from a wireless device matches the stored virtual key and whether the access control rule for the stored virtual key is satisfied. If the virtual key matches, and the access control rule for the stored virtual key is satisfied, the owner access point may transmit an open command to the entry.Type: ApplicationFiled: August 27, 2013Publication date: March 5, 2015Applicant: QUALCOMM IncorporatedInventors: Olivier Jean BENOIT, Fabrice Jean HOERNER
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Patent number: 8942095Abstract: A method, a system, and a computer program product is disclosed for identifying a quality of service (QoS) classification of a packet in a network by a network processor. The method comprising: providing a table wherein a priority value with a maximum of N values is used as an index into the table to retrieve a QoS classification having a maximum of M values with M less than N; receiving a data packet in a stream of data packets; extracting at least two priority indicator values from the packet; converting the at least two priority indicator values into a priority value; utilizing the priority value as an index into the table; extracting the entry in the table corresponding to the priority value as the QoS classification of the packet; and utilizing the QoS classification for subsequent processing of the data packet.Type: GrantFiled: November 22, 2011Date of Patent: January 27, 2015Assignee: International Business Machines CorporationInventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Jean Verplanken, Colin B. Verrilli
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Patent number: 8726134Abstract: Disclosed is a method for validating a data packet by a network processor supporting a first-network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum.Type: GrantFiled: May 8, 2012Date of Patent: May 13, 2014Assignee: International Business Machines CorporationInventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Jean Verplanken
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Patent number: 8726132Abstract: Disclosed is a method and system for validating a data packet by a network processor supporting a first network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The system produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The system validates the data packet by comparing the data packet checksum to the second checksum.Type: GrantFiled: November 22, 2011Date of Patent: May 13, 2014Assignee: International Business Machines CorporationInventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Jean Verplanken
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Patent number: 8675660Abstract: According to embodiments of the invention, there is provided a method for operating a network processor. The network processor receiving a first data packet in a stream of data packets and a set of receive-queues adapted to store receive data packets. The network processor processing the first data packet by reading a flow identification in the first data packet; determining a quality of service for the first data packet; mapping the flow identification and the quality of service into an index for selecting a first receive-queue for routing the first data packet; and utilizing the index to route the first data packet to the first receive-queue.Type: GrantFiled: May 8, 2012Date of Patent: March 18, 2014Assignee: International Business Machines CorporationInventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Jean Verplanken, Colin B. Verrilli
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Publication number: 20140015519Abstract: Flow valve comprising a casing (1) containing an electromagnetic assembly (2) for detecting a magnetic field, the electromagnetic assembly being fixed to a pendulum (3) suspended by an articulation (6) from a wall (5) of the casing, the casing containing a liquid for damping the movements of the pendulum, characterized in that the pendulum comprises opposite the articulation a surface (8) which has a spherical cap shape and which extends facing a wall (4) of the casing of complementary shape, defining a space having, dimensions suitable for producing a laminar rolling of the damping liquid between them, when the pendulum is in motion.Type: ApplicationFiled: April 19, 2011Publication date: January 16, 2014Applicant: SAGEM DEFENSE SECURITEInventors: Christian Cardoso, Didier Habert, Etienne Merlet, Fabrice Jean, Mickael Magalhaes, Sebastien Pautard
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Publication number: 20130308653Abstract: A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=<n×s/m.Type: ApplicationFiled: December 19, 2011Publication date: November 21, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Claude Basso, Jean L. Calvignac, Chih-Jen Chang, Damon Philippe, Natarajan Vaidhyanathan, Colin B. Verrilli, Fabrice Jean Verplanken
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Patent number: 8532129Abstract: Assigning work, such as data packets, from a plurality of sources, such as data queues in a network processing device, to a plurality of sinks, such as processor threads in the network processing device is provided. In a given processing period, sinks that are available to receive work are identified and sources qualified to send work to the available sinks are determined taking into account any assignment constraints. A single source is selected from an overlap of the qualified sources and sources having work available. This selection may be made using a hierarchical source scheduler for processing subsets of supported sources simultaneously in parallel. A sink to which work from the selected source may be assigned is selected from available sinks qualified to receive work from the selected source.Type: GrantFiled: December 30, 2009Date of Patent: September 10, 2013Assignee: International Business Machines CorporationInventors: Claude Basso, Jean L. Calvignac, Chih-Jen Chang, Hubertus Franke, Terry L. Nelms, II, Fabrice Jean Verplanken
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Publication number: 20120221928Abstract: Disclosed a method for validating a data packet by a network processor supporting a first, network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet: identities a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum.Type: ApplicationFiled: May 8, 2012Publication date: August 30, 2012Applicant: International Business Machines CorporationInventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Jean Verplanken
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Patent number: 8225188Abstract: Apparatus for providing a checksum in a network transmission. In one aspect of the invention, a checksum for a packet to be transmitted on a network is determined by retrieving packet information from a storage device, the packet information to be included in the packet to be transmitted. A blind checksum value is determined based on the retrieved packet information, and the blind checksum value is adjusted to a protocol checksum based on descriptor information describing the structure of the packet. The protocol checksum is inserted in the packet before the packet is transmitted.Type: GrantFiled: August 29, 2008Date of Patent: July 17, 2012Assignee: International Business Machines CorporationInventors: Claude Basso, Jean Louis Calvignac, Chih-Jen Chang, Philippe Damon, Ronald Edward Fuhs, Natarajan Vaidhyanathan, Fabrice Jean Verplanken, Colin Beaton Verrilli, Scott Michael Willenborg