Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first bottom barrier metal (BBM) layer on the first region and the second region; forming a first work function metal layer on the first BBM layer on the first region and the second region; removing the first work function metal (WFM) layer and part of the first BBM layer on the second region; and forming a diffusion barrier layer on the first WFM layer on the first region and the first BBM layer on the second region.

Abstract: The present invention provides an inflatable laryngeal mask airway (LMA) for endoscopic diagnosis and treatment. The inflatable LMA for endoscopic diagnosis and treatment includes a cuff and an airway tube. The cuff is fixedly connected to the airway tube. The airway tube includes a ventilation airway, an endoscope channel and an inflation channel which are arranged in parallel. The ventilation inlet, the endoscope inlet and the inflation inlet are located at the end of the airway tube away from the cuff. The cuff includes a base body and an air bag connected to the base body. The inflation outlet is connected to the air bag. The endoscope outlet is connected to a lower surface of the base body and directed to the front side of the base body. The back surface of the endoscope channel is provided with an expansion port extending from the endoscope inlet to the endoscope outlet.

Abstract: A dynamic five-hole probe includes a pressure sensing part, a pressure measuring hole transition section, a pressure acquisition section, dynamic pressure sensors and flexible wall pressure buffering tubes, the pressure sensing part being provided with pressure measuring holes to sense three dimensional dynamic pressure components of an airflow; the pressure measuring hole transition section transits from an inlet end surface five-hole structure into an outlet end surface five-hole structure; the pressure acquisition section has therein a centrally symmetric pressure measuring hole structure; pressure sensor mounting holes are in communication with the five pressure measuring holes; each of the dynamic pressure sensors is mounted in a corresponding one of the sensor mounting holes to measure a dynamic pressure of the airflow. The pressure sensing part may have a diameter of 3 mm or less.

Abstract: The present disclosure relates to a method for controlling a PLC using a PC program, wherein a source code of a PLC program includes a data section, the data section including data indicating services to be exposed by the PLC when running the PLC program, wherein a source code of the PC program is automatically generated using the data included in the data section and a PC program template, wherein the PLC is controlled using the PC program generated from the automatically generated source code of the PC program.

Abstract: The present disclosure provides a method for domesticating Saccharomyces cerevisiae which is resistant to fermentation inhibitors, high temperature and high concentration of ethanol. The method comprises a primary domestication and a secondary domestication of the S. cerevisiae, wherein the primary domestication comprises the steps of replacing the fermented mash with fresh liquefied mash and continuing fermentation when the ethanol content in the fermented mash reaches a higher concentration (>12% (v/v)), the replacement is performed for at least 20 times, and the time interval of replacements is 20-30 hours; the secondary domestication comprises the steps of performing high-temperature domestication on the primary domesticated strain by a temperature gradient and replacing the fermented mash for multiple times, wherein the temperature is raised by 0.5° C.-2° C. every 18-24 times of replacement. The domesticated S.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first bottom barrier metal (BBM) layer on the first region and the second region; forming a first work function metal layer on the first BBM layer on the first region and the second region; removing the first work function metal (WFM) layer and part of the first BBM layer on the second region; and forming a diffusion barrier layer on the first WFM layer on the first region and the first BBM layer on the second region.

Abstract: A first dummy gate and a second dummy gate are formed on a substrate with a gap between the first and second dummy gates. The first dummy gate has a first sidewall. The second dummy gate has a second sidewall directly facing the first sidewall. A first sidewall spacer is disposed on the first sidewall. A second sidewall spacer is disposed on the second sidewall. A contact etch stop layer is deposited on the first and second dummy gates and on the first and second sidewall spacers. The contact etch stop layer is subjected to a tilt-angle plasma etching process to trim a corner portion of the contact etch stop layer. An inter-layer dielectric layer is then deposited on the contact etch stop layer and into the gap.

Abstract: A method of detecting malware in Linux platform through the following steps: use objdump-D command to disassemble ELF format benign software and malware samples to generate assembly files; traverse the generated assembly files one by one, read the ELF files' code segment and meanwhile identify whether the code segment contains main( ) function; analyze the code segment read. Divide assembly code into different basic blocks. Each basic block is marked by its lowest address. Add control flow graph's vertex to the adjacency linked list; establish the relation between basic blocks, add control flow graph's edges to the adjacency linked list and generate a basic control flow graph; extract control flow graph's features and write them into ARFF files; take ARFF files as the data set of a machine learning tool named weka to carry out data mining and construct classifier; classify the ELF samples to be tested by using the classifier.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes first and second metal gates on a substrate with a gap therebetween. The first metal gate has a first sidewall, and the second metal gate has a second sidewall directly facing the first sidewall. A contact etch stop layer (CESL) is disposed within the gap and extends along the first and second sidewalls. The CESL has a first top portion adjacent to a top surface of the first metal gate and a second top portion adjacent to a top surface of the second metal gate. The first top portion and the second top portion have a trapezoid cross-sectional profile. A first sidewall spacer is disposed on the first sidewall and between the CESL and the first metal gate. A second sidewall spacer is disposed on the second sidewall and between the CESL and the second metal gate.

Abstract: The present invention provides a PEG-ACS/M-siRNA nanocomposite application, and method for reducing the histamine content during fishmeal storage thereof. A small interfering ribonucleic acid (siRNA) is designed and prepared according to a histidine decarboxylase gene of Morganella morganii (Morganella morganii subsp. morganii KT), and the histidine decarboxylase gene has a sequence of SEQ ID No: 1. A PEG-ACS/M-siRNA nanocomposite is prepared by using a PEGylated arginine-modified chitosan as a carrier. A PEG-ACS/M-siRNA nanocomposite is added to fishmeal in a certain ratio. The method for reducing the histamine content during fishmeal storage has a significant inhibitory effect on the histamine content during fishmeal storage, and can reduce the histamine content in fishmeal by 49%-53%, which has great significance for the control of biogenic amines in fishmeal in the feed industry.

Abstract: A structure of semiconductor device includes a gate structure, disposed on a substrate. A spacer is disposed on a sidewall of the gate structure, wherein the spacer is an l-like structure. A first doped region is disposed in the substrate at two sides of the gate structure. A second doped region is disposed in the substrate at the two sides of the gate structure, overlapping the first doped region. A silicide layer is disposed on the substrate within the second doped region, separating from the spacer by a distance. A dielectric layer covers over the second doped region and the gate structure with the spacer.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a liner on the fin-shaped structure; and removing the liner and part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve. Moreover, the method includes forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed.

Abstract: In general, the subject matter described in this disclosure can be embodied in a circuit-board attachment method. The method includes providing a circuit board that defines a channel in a surface of the circuit board, and placing a stencil over the surface of the circuit board so that a slot that is in the stencil and defined by the stencil aligns with the channel in the circuit board. The method includes applying solder to the stencil when the slot in the stencil is aligned with the channel in the circuit board to provide the solder into the slot in the stencil and the channel, and removing the stencil, leaving the solder in the channel and protruding from the channel. The method includes placing a component in contact with the solder that is protruding from the channel, and heating the solder to attach the component to the circuit board.

Abstract: A support tensor machine based neutral point grounding mode decision method and system adopts a support tensor machine method Based on three indexes, i.e., the power supply reliability index, safety index, and economical efficiency index, influences of different neutral point grounding modes are analyzed by employing the support tensor machine method to finally obtain a neutral point grounding mode capable of maximizing power supply reliability of a distribution network.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes first and second metal gates on a substrate with a gap therebetween. The first metal gate has a first sidewall, and the second metal gate has a second sidewall directly facing the first sidewall. A contact etch stop layer (CESL) is disposed within the gap and extends along the first and second sidewalls. The CESL has a first top portion adjacent to a top surface of the first metal gate and a second top portion adjacent to a top surface of the second metal gate. The first top portion and the second top portion have a trapezoid cross-sectional profile. A first sidewall spacer is disposed on the first sidewall and between the CESL and the first metal gate. A second sidewall spacer is disposed on the second sidewall and between the CESL and the second metal gate.

Abstract: A video sharing implementation method and system are provided, with the method including receiving a user's access request for a video sharing link which carries an address of a video and an identifier of a shared object, parsing the video sharing link to obtain the address of the video and the identifier of the shared object, playing the video according to the address of the video, and displaying the shared object corresponding to the identifier of the shared object in a video display interface, and jumping to a product link of the shared object in response to the user's selection of the shared object.

Abstract: A support tensor machine based neutral point grounding mode decision method and system adopts a support tensor machine method Based on three indexes, i.e., the power supply reliability index, safety index, and economical efficiency index, influences of different neutral point grounding modes are analyzed by employing the support tensor machine method to finally obtain a neutral point grounding mode capable of maximizing power supply reliability of a distribution network.

Abstract: A X-ray chest image rib suppression method based on Poisson model. It conducts contourlet transformation on the image and utilizes transformation coefficient correlation between different scales to conduct texture enhancement on the image; it designs strip-type detection filter in accordance with the Hessian matrix eigenvalue to the image and detects the area where the rib locates in; it combines enhanced texture and rib area information, establishes and solves rib suppression Poisson model, realizing the rib suppression in the image.

Abstract: A first-band radiating element configured to operate in a first frequency band may be designed for reducing distortion associated with one or more second-band radiating element configured to operate in a second frequency band. The first-band radiating element may include a first printed circuit board. The first printed circuit board may include a first surface including a first feed line connected to a feed network of a feed board of an antenna. The radiating element may also include a second surface opposite the first surface. The second surface may include one or more first conductive planes connected to a ground plane of the feed board; and one or more first open-end traces coupled to the one or more conductive planes.

Abstract: A first-band radiating element configured to operate in a first frequency band may be designed for reducing distortion associated with one or more second-band radiating element configured to operate in a second frequency band. The first-band radiating element may include a first printed circuit board. The first printed circuit board may include a first surface including a first feed line connected to a feed network of a feed board of an antenna. The radiating element may also include a second surface opposite the first surface. The second surface may include one or more first conductive planes connected to a ground plane of the feed board; and one or more first open-end traces coupled to the one or more conductive planes.