Patents by Inventor Farhad K. Moghadam

Farhad K. Moghadam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6593247
    Abstract: A silicon oxide layer is produced by plasma enhanced oxidation of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. Films having low moisture content and resistance to cracking are deposited by introducing oxygen into the processing chamber at a flow rate of less than or equal to the flow rate of the organosilicon compounds, and generating a plasma at a power density ranging between 0.9 W/cm2 and about 3.2 W/cm2. An optional carrier gas may be introduced to facilitate the deposition process at a flow rate less than or equal to the flow rate of the organosilicon compounds. The organosilicon compound preferably has 2 or 3 carbon atoms bonded to each silicon atom, such as trimethylsilane, (CH3)3SiH. An oxygen rich surface may be formed adjacent the silicon oxide layer by temporarily increasing oxidation of the organosilicon compound.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: July 15, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Tzu-Fang Huang, Yung-Cheng Lu, Li-Qun Xia, Ellie Yieh, Wai-Fan Yau, David W. Cheung, Ralf B. Willecke, Kuowei Liu, Ju-Hyung Lee, Farhad K. Moghadam, Yeming Jim Ma
  • Publication number: 20030129827
    Abstract: Methods are provided for depositing an oxygen-doped dielectric layer. The oxygen-doped dielectric layer may be used for a barrier layer or a hardmask. In one aspect, a method is provided for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas comprising an oxygen-containing organosilicon compound, carbon dioxide, or combinations thereof, and an oxygen-free organosilicon compound to the processing chamber, and reacting the processing gas to deposit an oxygen-doped dielectric material on the substrate, wherein the dielectric material has an oxygen content of about 15 atomic percent or less. The oxygen-doped dielectric material may be used as a barrier layer in damascene or dual damascene applications.
    Type: Application
    Filed: July 15, 2002
    Publication date: July 10, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Ju-Hyung Lee, Ping Xu, Shankar Venkataraman, Li-Qun Xia, Fei Han, Ellie Yieh, Srinivas D. Nemani, Kangsub Yim, Farhad K. Moghadam, Ashok K. Sinha, Yi Zheng
  • Patent number: 6495470
    Abstract: A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventors: S. M. Reza Sadjadi, Mansour Moinpour, Te Hua Lin, Farhad K. Moghadam
  • Publication number: 20020084257
    Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.
    Type: Application
    Filed: November 5, 2001
    Publication date: July 4, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Claes H. Bjorkman, Melissa Min Yu, Hongqing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
  • Patent number: 6413583
    Abstract: A method for depositing silicon oxide layers having a low dielectric constant by reaction of an organosilicon compound and a hydroxyl forming compound at a substrate temperature less than about 400° C. The low dielectric constant films contain residual carbon and are useful for gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, and shallow trench isolation dielectric layers in sub-micron devices. The hydroxyl compound can be prepared prior to deposition from water or an organic compound. The silicon oxide layers are preferably deposited at a substrate temperature less than about 40° C. onto a liner layer produced from the organosilicon compound to provide gap fill layers having a dielectric constant less than about 3.0.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 2, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Farhad K. Moghadam, David W. Cheung, Ellie Yieh, Li-Qun Xia, Wai-Fan Yau, Chi-I Lang, Shin-Puu Jeng, Frederic Gaillard, Shankar Venkataraman, Srinivas Nemani
  • Publication number: 20020074309
    Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.
    Type: Application
    Filed: November 5, 2001
    Publication date: June 20, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Claes H. Bjorkman, Melissa Min Yu, Hongqing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
  • Publication number: 20020031901
    Abstract: A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
    Type: Application
    Filed: December 29, 1995
    Publication date: March 14, 2002
    Inventors: S.M. REZA SADJADI, MANSOUR MOINPOUR, TE H. LIN, FARHAD K. MOGHADAM
  • Patent number: 6340435
    Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: January 22, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Claes H. Bjorkman, Min Melissa Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
  • Publication number: 20020000664
    Abstract: The present invention provides a method for forming a barrier film on a substrate by depositing a first dielectric film, such as a tetra-ethyl-ortho-silicate (TEOS) film, on a substrate and depositing a silicon nitride film over the dielectric film. Preferably, the method further comprises depositing a silicate glass film over the barrier film. The present invention further provides a semiconductor device comprising: a polysilicon substrate; a dielectric film deposited over the polysilicon substrate; a silicon nitride film deposited over the dielectric film; a silicate glass film deposited over the silicon nitride film; and a metal film deposited selectively over the silicate glass film.
    Type: Application
    Filed: February 5, 1999
    Publication date: January 3, 2002
    Inventors: LIE-YEA CHENG, CHIU CHAN, FARHAD K. MOGHADAM
  • Patent number: 5883436
    Abstract: A method of forming a contact opening between two conductive features over a semiconductor substrate. Oxide spacers are formed adjacent to the conductive features. A doped oxide layer is then deposited over the semiconductor substrate. Finally, the contact opening is etched through the doped oxide layer between the conductive features such that the oxide spacers are exposed within the contact opening.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: March 16, 1999
    Assignee: Intel Corporation
    Inventors: S. M. Reza Sadjadi, Mansour Moinpour, Te Hua Lin, Farhad K. Moghadam
  • Patent number: 5426076
    Abstract: A method of forming a silicon dioxide layer (SiO.sub.2) on a semiconductor substrate which fills gaps between surface features by means of applying, cleaning, and etching a series of layers of silicon dioxide. A layer of SiO.sub.2 is deposited by plasma enhanced chemical vapor deposition of tetraethyl orthosilicate; and a second layer of SiO.sub.2 is deposited thereon by thermal chemical vapor deposition. A series of etches are performed, removing the second layer of SiO.sub.2 from all regions of the substrates except the gaps. A third layer of SiO.sub.2, formed by plasma enhanced chemical vapor deposition, is then deposited. An additional etch step further planarizes the surface of the substrate.
    Type: Grant
    Filed: July 8, 1993
    Date of Patent: June 20, 1995
    Assignee: Intel Corporation
    Inventor: Farhad K. Moghadam
  • Patent number: 5389581
    Abstract: A method of forming a device and the device itself that utilizes a high density plasma-enhanced TEOS-based intermetal dielectric is disclosed. The high density is accomplished though the use of higher RF power and higher oxygen flow rate so that the TEOS is more completely oxidized. The higher density intermetal dielectric absorbs water from air slower than a standard intermetal dielectric film. This lower water absorbance reduces the amount of water in the device and reduces hot electron induced device degradation.
    Type: Grant
    Filed: May 25, 1993
    Date of Patent: February 14, 1995
    Assignee: Intel Corporation
    Inventors: Philip Freiberger, Ragupathy V. Giridhar, Brett Huff, Farhad K. Moghadam
  • Patent number: 5326723
    Abstract: A method for cleaning a chemical vapor deposition (CVD) process for depositing tungsten. After the tungsten has been deposited and the wafer has been removed from the chamber, the chamber undergoes an in-situ cleaning process. In the currently preferred embodiment the in-situ cleaning process consists of cleaning the chamber with nitrogen tri-fluoride (NF.sub.3) and hydrogen (H.sub.2) nitrogen (N.sub.2) plasmas. The tungsten CVD cleaning process also includes purging the chamber with the dilute mixture of silane (SiH.sub.4), argon (Ar) and nitrogen (N.sub.2).
    Type: Grant
    Filed: September 9, 1992
    Date of Patent: July 5, 1994
    Assignee: Intel Corporation
    Inventors: William G. Petro, Farhad K. Moghadam