Patents by Inventor Fariba DANESH

Fariba DANESH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113092
    Abstract: A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.
    Type: Application
    Filed: October 9, 2023
    Publication date: April 4, 2024
    Inventors: Willibrordus Gerardus Maria VAN DEN HOEK, Tsun Yin LAU, Cameron DANESH, Fariba DANESH
  • Patent number: 11908974
    Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: February 20, 2024
    Assignee: GLO TECHNOLOGIES LLC
    Inventors: Max Batres, Fariba Danesh, Michael J. Cich, Zhen Chen
  • Publication number: 20230387350
    Abstract: A red-light emitting diode includes an n-doped portion, a p-doped portion, and a light emitting region located between the n-doped portion and a p-doped portion. The light emitting region includes a light-emitting indium gallium nitride layer emitting light at a peak wavelength between 600 and 750 nm under electrical bias thereacross, an aluminum gallium nitride layer located on the light-emitting indium gallium nitride layer, and a GaN barrier layer located on the aluminum gallium nitride layer.
    Type: Application
    Filed: March 21, 2023
    Publication date: November 30, 2023
    Inventors: Fariba DANESH, Richard P. SCHNEIDER, Fan REN, Michael JANSEN, Nathan GARDNER
  • Patent number: 11784176
    Abstract: A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: October 10, 2023
    Assignee: NANOSYS, INC.
    Inventors: Willibrordus Gerardus Maria Van Den Hoek, Tsun Yin Lau, Cameron Danesh, Fariba Danesh
  • Patent number: 11710805
    Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: July 25, 2023
    Assignee: NANOSYS, INC.
    Inventors: Fariba Danesh, Tsun Lau, Richard P. Schneider, Jr., Michael Jansen, Max Batres
  • Patent number: 11611018
    Abstract: A red-light emitting diode includes an n-doped portion, a p-doped portion, and a light emitting region located between the n-doped portion and a p-doped portion. The light emitting region includes a light-emitting indium gallium nitride layer emitting light at a peak wavelength between 600 and 750 nm under electrical bias thereacross, an aluminum gallium nitride layer located on the light-emitting indium gallium nitride layer. and a GaN barrier layer located on the aluminum gallium nitride layer.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: March 21, 2023
    Assignee: NANOSYS, INC.
    Inventors: Fariba Danesh, Richard P. Schneider, Jr., Fan Ren, Michael Jansen, Nathan Gardner
  • Publication number: 20220384404
    Abstract: A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Willibrordus Gerardus Maria VAN DEN HOEK, Tsun Yin LAU, Cameron DANESH, Fariba DANESH
  • Patent number: 11444065
    Abstract: A light emitting device includes a backplane, an array of light emitting diodes attached to a frontside of the backplane, a positive tone, imageable dielectric material layer, such as a positive photoresist layer, located on the frontside of the backplane and laterally surrounding the array of light emitting diodes, such that sidewalls of the light emitting diodes contacting the positive tone, imageable dielectric material layer have a respective reentrant vertical cross-sectional profile, and at least one common conductive layer located over the positive tone, imageable dielectric material layer and contacting the light emitting diodes.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: September 13, 2022
    Assignee: NANOSYS, INC.
    Inventors: Willibrordus Gerardus Maria Van Den Hoek, Tsun Yin Lau, Cameron Danesh, Fariba Danesh
  • Patent number: 11430830
    Abstract: A white LED and a method of repairing a light emitting device including, the method including colored light emitting diodes (LEDs) configured to emit different colors of light and arranged in pixels on a backplane of the device, the method including: determining whether each pixel is a functional pixel or a defective pixel; and repairing the defective pixels by transferring white LEDs to the backplane in each defective pixel.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: August 30, 2022
    Assignee: NANOSYS, INC.
    Inventors: Fariba Danesh, Zhen Chen
  • Patent number: 11417794
    Abstract: A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: August 16, 2022
    Assignee: NANOSYS, INC.
    Inventors: Zulal Tezcan Ozel, Tsun Lau, Benjamin Leung, Fariba Danesh
  • Patent number: 11362238
    Abstract: A light emitting diode includes a first conductivity type semiconductor material region, an active region located over the first conductivity type semiconductor material region, a second conductivity type semiconductor material layer located over the active region, a first layer containing at least one of nickel or gold located over the second conductivity type semiconductor material layer, a reflective top contact electrode located over the first layer, a dielectric material layer located over the top contact electrode and containing an opening, and a reflector located over the dielectric material layer and contacting the top contact electrode through the opening in the dielectric material layer.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 14, 2022
    Assignee: NANOSYS, INC.
    Inventors: Fariba Danesh, Tsun Lau
  • Publication number: 20220149240
    Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 12, 2022
    Inventors: Max Batres, Fariba Danesh, Michael J. Cich, Zhen Chen
  • Patent number: 11264537
    Abstract: A light emitting diode includes a n-doped region, a p-doped region, and a light emitting region located between the n-doped region and a p-doped region. The n-doped region includes a first GaN layer, at least one n-doped second GaN layer located over the first GaN layer, an AlGaN dislocation blocking layer located over the at least one n-doped second GaN layer, and a n-doped third GaN layer located over the AlGaN dislocation blocking film.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: March 1, 2022
    Assignee: NANOSYS, INC.
    Inventors: Zhen Chen, Fariba Danesh, Fan Ren, Shuke Yan
  • Patent number: 11264539
    Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: March 1, 2022
    Assignee: NANOSYS, INC.
    Inventors: Max Batres, Fariba Danesh, Michael J. Cich, Zhen Chen
  • Patent number: 11257983
    Abstract: A light emitting device, such as an LED, is formed by forming a plurality of semiconductor nanostructures having a doping of a first conductivity type through, and over, a growth mask layer overlying a doped compound semiconductor layer. Each of the plurality of semiconductor nanostructures includes a nanofrustum including a bottom surface, a top surface, tapered planar sidewalls, and a height that is less than a maximum lateral dimension of the top surface, and a pillar portion contacting the bottom surface of the nanofrustum and located within a respective one of the openings through the growth mask layer. A plurality of active regions on the nanofrustums. A second conductivity type semiconductor material layer is formed on each of the plurality of active regions.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: February 22, 2022
    Assignee: NANOSYS, INC.
    Inventors: Richard P. Schneider, Jr., Benjamin Leung, Fariba Danesh, Zulal Tezcan Ozel, Miao-Chan Tsai
  • Patent number: 11069837
    Abstract: A light emitting diode (LED) includes a n-doped semiconductor material layer located over a substrate, an active region including an optically active compound semiconductor layer stack configured to emit light located over the n-doped semiconductor material layer, a p-doped semiconductor material layer located over the active region and containing a nickel doped surface region, a conductive layer contacting the nickel doped surface region of the p-doped semiconductor material, and a device-side bonding pad layer electrically connected to the conductive layer.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: July 20, 2021
    Assignee: GLO AB
    Inventors: Fariba Danesh, Max Batres, Michael J. Cich, Zhen Chen
  • Publication number: 20210202789
    Abstract: A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
    Type: Application
    Filed: August 14, 2018
    Publication date: July 1, 2021
    Inventors: Zulal TEZCAN, Tsun LAU, Benjamin LEUNG, Fariba DANESH
  • Patent number: 10998465
    Abstract: A light emitting device includes a substrate including a doped compound semiconductor layer, a mesa structure located on the doped compound semiconductor layer and containing a first-conductivity-type compound semiconductor layer, an active layer stack configured to emit light at a peak wavelength, a second-conductivity-type compound semiconductor layer, and a transparent conductive oxide layer, and a dielectric material layer laterally surrounding the mesa structure and including an upper portion that overlies a peripheral region of the mesa structure and extending above the transparent conductive oxide layer, wherein an opening in the upper portion of the dielectric material layer is located over a center region of the mesa structure.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: May 4, 2021
    Assignee: GLO AB
    Inventors: Fariba Danesh, Cameron Dean Danesh, Tsun Lau
  • Publication number: 20210074775
    Abstract: A light emitting device includes a first light emitting diode configured to emit light at a first peak wavelength, a second light emitting diode configured to emit light at a second peak wavelength that is different from the first peak wavelength, and a third light emitting diode including, from bottom to top, a lower electrode, an organic light emitting material portion, and an upper electrode, where the third light emitting diode is configured to emit light at a third peak wavelength that is different from the first and second peak wavelengths. A pattern definition layer which includes an opaque material covers at least a portion of the organic light emitting material portion and includes an opening overlying the organic light emitting material portion.
    Type: Application
    Filed: September 11, 2019
    Publication date: March 11, 2021
    Inventors: Timothy GALLAGHER, Brian KIM, Fariba DANESH
  • Publication number: 20210066550
    Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 4, 2021
    Inventors: Fariba DANESH, Tsun LAU, Richard P. SCHNEIDER, JR., Michael JANSEN, Max BATRES