Abstract: A floating gate memory device comprises a channel for conducting carriers from source to drain, a semiconductor heterostructure forming a potential well (floating gate) for confining carriers sufficiently proximate the channel so as to at least partially deplete it, and a graded bandgap injector region between the control gate and the floating gate for controlling the injection of carriers into and out of the potential well. Also described is a three element memory cell, including the memory device and two FETs, which operates from a constant, non-switched supply voltage and two-level control voltages. Arrays of memory devices may also be used to detect light in a variety of applications such as imaging.

Abstract: A semiconductor integrated resonant-tunneling device having multiple negative-resistance regions, and having essentially equal current peaks in such regions, is useful as a highly compact element, e.g., in apparatus designed for ternary logic operations, frequency multiplication, waveform scrambling, memory operation, parity-bit generation, and coaxial-line driving. The device can be made by layer deposition on a substrate and includes a resonant-tunneling structure between contacts such that side-by-side first and third contacts are on one side, and a second contact is on the opposite side of the resonant-tunneling structure.

Abstract: A semiconductor integrated resonant-tunneling device having multiple negative-resistance regions, and having essentially equal current peaks in such regions, is useful as a highly compact element, e.g., in apparatus designed for ternary logic operations, frequency multiplication, waveform scrambling, memory operation, parity-bit generation, and coaxial-line driving. The device can be made by layer deposition on a substrate and includes a resonant-tunneling structure between contacts such that side-by-side first and third contacts are on one side, and a second contact is on the opposite side of the resonant-tunneling structure. Disclosed further are (two-terminal) resonant-tunneling diodes as incorporated in memory devices, e.g., in lieu of 2-transistsor flip-flops; room-temperature device operation; and devices comprising an essentially undoped accelerator region between an emitter contact and a resonant-tunneling structure.

Abstract: A resonant-tunneling, heterostructure bipolar transistor having a quantum well between emitter contact and collector region is described. In one embodiment, a compositionally graded portion of the emitter region is adjacent to the base region, and there is a double barrier in the base region. In another embodiment the quantum well is defined by the emitter and a potential barrier in the base region. Further embodiments have a quantum well between emitter and collector regions or else within the emitter region.

Abstract: A heterojunction bipolar transistor having means for changing carrier transport properties is described.

Abstract: An avalanche photodetector using a quantum well superlattice in which impact ionization of carriers in the well layers occurs across the band-edge discontinuity is described.

Abstract: Semiconductor structures suitable for repeated velocity overshoot are described. The structure comprises at least two velocity overshoot sections with each section comprising a first semiconductor region having a rapid change in potential and a dimension such that the carrier transit time is comparable to or shorter than the mean scattering time and a second semiconductor region having a more gradual change in potential and a dimension such that the carrier transit time is sufficient to allow the energy relaxation time to be exceeded.

Abstract: A resonant tunneling device having a one-dimensional quantum well comprises a semiconductor region capable of exhibiting one-dimensional quantization. The device comprises source and drain contact regions adjoining such semiconductor region as well as a gate contact for applying a field to such region; the device can be implemented, e.g., by methods of III-V deposition and etching technology. Under suitable source-drain bias conditions the device can function as a transistor having negative transconductance.

Abstract: A structure having a sawtooth graded bandgap region between two layers having the same conductivity type is useful as a photodetector.

Abstract: Heterojunction devices having doping interface dipoles near the heterojunction interface are disclosed. The doping interface dipoles comprise two charge sheets of different conductivity type which are positioned within a carrier mean free path of the heterojunction interface.

Abstract: Photoconductive gain is observed in a device comprising a superlattice having well and barrier layers, and cladding layers on the opposite sides of the superlattice with the barrier layers of the superlattice having an energy bandgap greater than the bandgap of the cladding layers.

Abstract: A photodetector having a graded bandgap region is an ultrahigh speed photodetector when operated at zero bias.

Abstract: The property of materials in the InP system, whereby helium ion or deuteron bombarded p-type material becomes highly resistive but n-type material remains relatively conductive, is utilized to fabricate integrated circuits which include buried semiconductor interconnections or bus bars between devices.

Abstract: A device having a selectively doped varying bandgap region with pyroelectric characteristics is described which is useful as a photodetector or temperature sensor. A plurality of selectively doped regions forming a superlattice may also be used. Ferroelectric devices are also described.

Abstract: The invention is a reduced noise avalanche photodetector in which the energy band structure causes one type of charge carrier to ionize at a faster rate than the other type of charge carrier.In a preferred embodiment the inventive structure comprises a relatively narrow bandgap semiconductor layer of a first conductivity type located contiguous with and between two relatively wider bandgap layers of a second conductivity type. Means are provided for applying an electric field parallel to the plane of the layers.In a preferred mode of operation, light is absorbed in the narrow bandgap layer and charge carriers are generated in response thereto. One type of charge carrier is confined to the narrow bandgap layer and undergoes avalanche multiplication therein in a direction parallel to the applied field. The other type of charge carrier is swept out into the wider bandgap layers where avalanche multiplication takes place at a negligible rate.

Abstract: A multistage avalanche photodetector in which the ionization energy is provided by an energy band discontinuity is described. The photodetector provides low noise optical detection at low voltage.

Abstract: A photodetector useful between 1.0 and 1.6 microns and having an InGaAs layer with an adjacent InGaAsP p-n junction disposed on the InGaAs layer is described.

Abstract: The invention is a reduced noise avalanche photodetector. The detector comprises a p-type region, an n-type region, and a graded bandgap avalanche region situated between the p- and n-type regions. Radiation to be detected is absorbed in one of the p-type and n-type regions and charge carriers are generated in response thereto.When the device is under a reverse bias, one type of photogenerated charge carrier is injected by diffusion into the graded bandgap region and initiates an avalanche discharge therein. The carrier type initiating the discharge moves toward a region of decreasing bandgap energy, while the other type of charge carrier moves toward a region of increasing bandgap energy, thus resulting in a large difference between the ionization coefficients of the two types of charge carriers. The differing "quasi-electric" fields experienced by the two types of charge carriers also contributes to the difference between the ionization coefficients of the electrons and holes.