Abstract: The present disclosure provides a synchronization signal generating circuit, a chip, and a synchronization method and a synchronization device, based on a multi-core architecture, configured to generate a synchronization signal for M node groups, wherein each of the node groups includes at least one node, and M is an integer greater than or equal to 1. The synchronization signal generating circuit includes: a synchronization signal generating sub-circuit and M group ready signal generating sub-circuits. The M group ready signal generating sub-circuits are in one-to-one correspondence with the M node groups. The synchronization signal generating sub-circuit generates a first synchronization signal based on the first to-be-started signal, wherein the first synchronization signal is configured to instruct the K nodes in the first node group to start synchronization.

Abstract: A negative electrode material comprises: carbon atoms uniformly distributed in a silicon oxide matrix at an atomic level; the carbon atoms are bonded to silicon atoms to form disordered C—Si bonds, and an X-ray diffraction energy spectrum has no SiC crystallization peak. In an X-ray photoelectron spectroscopy of the negative electrode material, there is a binding peak belonging to the C—Si bond at a location of 283.5±1 eV after a C1s energy spectrum is subjected to peak splitting. The average particle size of the negative electrode material particles is 1 nm-100 ?m, and the specific surface area is 0.5 m2/g-40 m2/g. The mass of the carbon atoms accounts for 0.1%-40% of the mass of the silicon oxide matrix. The ultra-fine silicon obtained by gaseous treatment is bonded to highly conductive carbon to form a disordered C—Si bond structure mixed at a molecular level.

Abstract: The structure of cathode material for a silicon-based lithium ion battery is that carbon atoms are uniformly dispersed and distributed in a silicon (II) oxide matrix on an atomic scale. The average particle diameter D50 of the particles in the cathode material for the silicon-based lithium ion battery is 1 nm to 100 ?m, and the specific surface area is 0.5 m2/g to 40 m2/g; and the mass of the carbon atoms accounts for 0.1% to 40% of the mass of the silicon (II) oxide matrix. In the disclosure, a carbon-containing gas source is introduced during the preparation process of silicon (II) oxide, and the distribution of carbon atoms in the silicon (II) oxide is bulk phase distribution, the cathode material has carbon bulk phase doping, which improves the electrical conductivity of the material and the cycling stability of lithium ion batteries.

Abstract: This application provides a call method and a terminal device. The method includes: when roaming from a home public land mobile network (HPLMN) to a visited public land mobile network (VPLMN), a terminal device obtains a first emergency number list of the VPLMN, and the emergency number corresponds to at least one emergency service type; the terminal device obtains a first number, and when the first number is an emergency number in a second emergency number list of the HPLMN and the first number is not an emergency number in the first emergency number list, determines a second number based on the first number, where the second number is the emergency number in the first emergency number list, and the second number and the first number correspond to a same emergency service type; and the terminal device initiates an emergency call based on the second number.

Abstract: This application provides a drive and a data transmission method, to implement low-latency transmission. The drive includes a CDR circuit, an elastic buffer, a receiver circuit, and a transmitter circuit. The CDR circuit is configured to recover a receive clock from a received signal. The receiver circuit is configured to recover sent data from the received signal by using the receive clock. The elastic buffer is configured to move the sent data in by using the receive clock and move the data out by using the receive clock. The transmitter circuit is configured to send the sent data from the elastic buffer by using the receive clock.

Abstract: The present disclosure discloses a method for automatically identifying south troughs by improved Laplace and relates to the technical field of meteorology. The method includes the following steps: acquiring grid data of a geopotential height field; calculating a gradient field of the geopotential height field in an x direction; searching for a turning point where a gradient value turned from being negative to being positive, and cleaning the gradient field; calculating a divergence of the x direction to obtain an improved Laplacian numerical value L?; performing 0,1 binarization processing on the L? to obtain a black-and-white image and a plurality of targets of potential troughs, merging the black-and-white image and the plurality of targets of the potential troughs by expansion, recovering original scale through erosion, and selecting an effective target through an angle of direction of a contour and an axial ratio.

Abstract: Disclosed a method for predicting permeability of a multi-mineral phase digital core based on deep learning. In the present disclosure, a three-dimensional digital core is constructed and a pore structure is randomly generated; after a plurality of multi-mineral digital core images is acquired by performing image segmentation on the three-dimensional digital core, permeability corresponding to each of the multi-mineral digital core images is acquired by simulation using multi-physics field simulation software and a multi-mineral digital core data set is constructed based on the plurality of multi-mineral digital core images and the permeability corresponding to each of the multi-mineral digital core images; an SE-ResNet18 convolutional neural network is constructed and trained with the multi-mineral digital core data set; and an image of a multi-mineral core to be predicted is input into the trained SE-ResNet18 convolutional neural network to determine the permeability of the multi-mineral core.

Abstract: Embodiments of this application disclose a data interface equalization adjustment method and apparatus, a device, and a storage medium, and relate to the field of data interface technologies. The method includes: A second device determines equalization parameter indication information of a first transmitter TX on a first data interface. The second device sends a first equalization training sequence block ETSB to a corresponding RX on the first data interface through a TX on a second data interface, where the first ETSB carries the equalization parameter indication information and equalization target indication information, and the equalization target indication information indicates that the first TX is an equalization target. The first device determines the equalization target to be the first TX based on the equalization target indication information, and adjusts an equalization parameter of the first TX to an equalization parameter indicated by the equalization parameter indication information.

Abstract: An equalization time configuration method is applied to a processor system in which a Peripheral Component Interconnect Express (PCIe) bus or a Cache Coherent Interconnect for Accelerators (CCIX) bus is used. The equalization time configuration method includes determining a working physical layer (PHY) type of a master chip and a working PHY type of a slave chip, determining an equalization time of the slave chip in a fourth phase of equalization based on the working PHY type of the master chip, and determining an equalization time of the master chip in a third phase of the equalization based on the working PHY type of the slave chip.

Abstract: The present disclosure provides a quantum dot particle aggregate and a preparation method therefor, a preparation method for a light conversion device, and quantum dot particles. The preparation method for the quantum dot particle aggregate includes: mixing a plurality of first polymer particles, a first quantum dot solution and a second polymer solution, and drying to obtain an aggregate containing a plurality of quantum dot particles A, where each of the quantum dot particles A includes a core of a first polymer particle and a shell of a second polymer formed by the second polymer, a plurality of first quantum dots are positioned in the shell of the second polymer, and the first polymer particle has a minimum dimension greater than or equal to 0.3 mm. The process reduces the damage to quantum dots and can prolong the life time of application products of quantum dots.

Abstract: A silicon-based negative electrode material containing a silicate skeleton, a negative electrode plate and a lithium battery. The silicon-based negative electrode material comprises a modified silicon monoxide material having a dispersedly distributed silicate material inside same. The general formula of the modified silicon monoxide material is MxSiOy, with 1<x<6, 3<y<6, element M comprising one or more of Mg, Ni, Cu, Zn, Al, Na, Ca, K, Li, Fe and Co, and the grain size being 0.5-100 nm. In the modified silicon monoxide material, the content of the silicate material is 5-60% of the total mass of the modified silicon monoxide material. The dispersedly distributed silicate material forms a skeleton structure of the silicon-based negative electrode material, does not undergo a physicochemical reaction along with the lithium removal and lithium intercalation of the silicon-based negative electrode material in the cycle process, and maintains the original structure thereof after multiple cycles.

Abstract: A negative electrode material on which a metal element is gradient-doped and an application thereof. The negative electrode material comprises a granular silica/M composite material on which a metal element M is gradient-doped. The general formula of the silica is SiOx, wherein 0<x<2. The metal element M comprises one or more among Na, Mg, Al, Li, Mn, Fe, Co, Ni, Cu, or Zn. In the negative electrode material, the content of the metal element M gradually decreases from the surface to the core, presenting a doping distribution having a continuous concentration gradient. The general chemical formula of the silica/M composite material is SiMyOz, wherein 0<y<10 and 0<z<10.

Abstract: A fast equalization method is provided, which includes: storing a receive parameter and a transmit parameter, of each of a primary chip and a secondary chip, that meet a link stability requirement and that are obtained when link equalization is previously performed; and when determining that link equalization needs to be performed, configuring, as first fast equalization timeout duration, a larger value in initial fast equalization timeout duration of the primary chip and initial fast equalization timeout duration of the secondary chip, and invoking the foregoing receive and transmit parameters, so that the primary chip and the secondary chip perform a current time of link equalization based on the first fast equalization timeout duration and the foregoing transmit and receive parameters.

Abstract: A retimer application system is provided, which includes a primary chip, a retimer, and a secondary chip. After first link training is completed, the retimer is configured to store, in a first storage area, an equalization parameter corresponding to each rate during the first link training, and data stored in the first storage area is not lost when the retimer performs a reset operation. The retimer is further configured to: receive a reset indication, and perform the reset operation according to the reset indication. The primary chip and the secondary chip are configured to perform second link training triggered by the reset indication. During the second link training, the retimer is further configured to: invoke the equalization parameter, and transparently transmit a training sequence in the second link training to the primary chip or the secondary chip based on the equalization parameter.

Abstract: A hospital human resource information management file cabinet is provided, including a support base plate, a lower surface of which is fixedly connected to upper surfaces of three fan assemblies; left ends of the three fan assemblies are respectively connected to outer surfaces of three first conduits, and front ends of the three first conduits are in communication with back ends of three second conduits. The file cabinet speeds up air flow rate on surfaces of the files therein, prevents moisture causing damage to the files, reduces information loss, and continuously treats the moisture inside, which in turn guarantees the service life of the file cabinet.

Abstract: A storage device includes a hard disk backplane, a first cascading board, and a hard disk array. The hard disk array includes a plurality of hard disks, and is located on a first side of the hard disk backplane. The first cascading board is a field-replaceable unit FRU, and is located on a second side of the hard disk backplane.

Abstract: A fast equalization method is provided, which includes: storing a receive parameter and a transmit parameter, of each of a primary chip and a secondary chip, that meet a link stability requirement and that are obtained when link equalization is previously performed; and when determining that link equalization needs to be performed, configuring, as first fast equalization timeout duration, a larger value in initial fast equalization timeout duration of the primary chip and initial fast equalization timeout duration of the secondary chip, and invoking the foregoing receive and transmit parameters, so that the primary chip and the secondary chip perform a current time of link equalization based on the first fast equalization timeout duration and the foregoing transmit and receive parameters.

Abstract: An equalization training method and apparatus are described. The method includes obtaining a training rate of each of a master chip and a slave chip in a target phase of equalization training. The method also includes determining a target rate threshold interval within which the training rate in the target phase falls, determining, based on a correspondence between N+1 rate threshold intervals and N+1 equalization timeout periods, a target equalization timeout period corresponding to the target rate threshold interval, and configuring the target equalization timeout period as an equalization timeout period in the target phase.

Abstract: Disclosed is a data processing apparatus, chip, and data processing method. The data processing apparatus includes: a plurality of processing cores having a preset execution sequence, the plurality of processing cores including a head processing core and at least one other processing core; wherein the head processing core is configured to send an instruction, and receive and execute a program obtained according to the instruction; and each of the other processing cores is configured to receive and execute a program sent by a previous processing core in the preset execution sequence.

Abstract: Disclosed is a task allocation method, apparatus, electronic device, and computer-readable storage medium. The task allocation method includes: in response to receiving a synchronization signal, executing, by the master processing core, a task update instruction to obtain a to-be-executed task segment; receiving, by a processing core for executing the task, the to-be-executed task segment, wherein the processing core for executing the task includes the master processing core and/or the slave processing core; executing, by the processing core for executing the task, the to-be-executed task segment; and in response to completion of execution of the to-be-executed task segment, sending, by the processing core for executing the task, a synchronization request signal, wherein the synchronization request signal is configured to trigger generation of the synchronization signal.